OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | // SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
2 | /dts-v1/; |
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3 | |||
4 | #include <dt-bindings/gpio/gpio.h> |
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5 | #include <dt-bindings/input/input.h> |
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6 | |||
7 | #include "qca9557.dtsi" |
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8 | |||
9 | / { |
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10 | compatible = "openmesh,om5p-ac-v2", "qca,qca9557"; |
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11 | model = "OpenMesh OM5P-AC V2"; |
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12 | |||
13 | extosc: ref { |
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14 | compatible = "fixed-clock"; |
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15 | #clock-cells = <0>; |
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16 | clock-output-names = "ref"; |
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17 | clock-frequency = <40000000>; |
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18 | }; |
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19 | |||
20 | leds { |
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21 | compatible = "gpio-leds"; |
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22 | |||
23 | power { |
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24 | label = "om5pac:blue:power"; |
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25 | gpios = <&gpio 14 GPIO_ACTIVE_LOW>; |
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26 | }; |
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27 | |||
28 | wifi_green { |
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29 | label = "om5pac:green:wifi"; |
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30 | gpios = <&gpio 13 GPIO_ACTIVE_LOW>; |
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31 | }; |
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32 | |||
33 | wifi_yellow { |
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34 | label = "om5pac:yellow:wifi"; |
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35 | gpios = <&gpio 15 GPIO_ACTIVE_LOW>; |
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36 | }; |
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37 | |||
38 | wifi_red { |
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39 | label = "om5pac:red:wifi"; |
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40 | gpios = <&gpio 23 GPIO_ACTIVE_LOW>; |
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41 | }; |
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42 | }; |
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43 | |||
44 | keys { |
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45 | compatible = "gpio-keys-polled"; |
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46 | poll-interval = <100>; |
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47 | |||
48 | button0 { |
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49 | label = "reset"; |
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50 | linux,code = <KEY_RESTART>; |
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51 | gpios = <&gpio 1 GPIO_ACTIVE_LOW>; |
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52 | }; |
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53 | }; |
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54 | |||
55 | gpio-export { |
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56 | compatible = "gpio-export"; |
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57 | #size-cells = <0>; |
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58 | |||
59 | gpio_pa_dcdc { |
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60 | gpio-export,name = "om5pac:pa_dcdc"; |
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61 | gpio-export,output = <1>; |
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62 | gpios = <&gpio 2 GPIO_ACTIVE_HIGH>; |
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63 | }; |
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64 | gpio_pa_high { |
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65 | gpio-export,name = "om5pac:pa_high"; |
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66 | gpio-export,output = <1>; |
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67 | gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; |
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68 | }; |
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69 | }; |
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70 | }; |
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71 | |||
72 | &pinmux { |
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73 | pinmux_pa_dcdc_pins { |
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74 | pinctrl-single,bits = <0x0 0xff00 0x0>; |
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75 | }; |
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76 | |||
77 | pinmux_pa_high_pins { |
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78 | pinctrl-single,bits = <0x10 0xff 0x0>; |
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79 | }; |
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80 | }; |
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81 | |||
82 | &pcie0 { |
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83 | status = "okay"; |
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84 | }; |
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85 | |||
86 | &uart { |
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87 | status = "okay"; |
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88 | }; |
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89 | |||
90 | &pll { |
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91 | clocks = <&extosc>; |
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92 | }; |
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93 | |||
94 | &spi { |
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95 | status = "okay"; |
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96 | num-cs = <1>; |
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97 | |||
98 | flash@0 { |
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99 | compatible = "jedec,spi-nor"; |
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100 | reg = <0>; |
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101 | spi-max-frequency = <25000000>; |
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102 | |||
103 | partitions { |
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104 | compatible = "fixed-partitions"; |
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105 | #address-cells = <1>; |
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106 | #size-cells = <1>; |
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107 | |||
108 | partition@0 { |
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109 | label = "u-boot"; |
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110 | reg = <0x000000 0x040000>; |
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111 | read-only; |
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112 | }; |
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113 | |||
114 | partition@1 { |
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115 | label = "u-boot-env"; |
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116 | reg = <0x040000 0x010000>; |
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117 | }; |
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118 | |||
119 | partition@2 { |
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120 | compatible = "denx,uimage"; |
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121 | label = "firmware"; |
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122 | reg = <0x850000 0x7a0000>; |
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123 | }; |
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124 | |||
125 | partition@3 { |
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126 | label = "ART"; |
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127 | reg = <0xff0000 0x010000>; |
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128 | read-only; |
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129 | }; |
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130 | }; |
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131 | }; |
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132 | }; |
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133 | |||
134 | &mdio0 { |
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135 | status = "okay"; |
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136 | |||
137 | phy4: ethernet-phy@4 { |
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138 | reg = <4>; |
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139 | phy-mode = "rgmii-id"; |
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140 | }; |
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141 | }; |
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142 | |||
143 | &mdio1 { |
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144 | status = "okay"; |
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145 | |||
146 | phy1: ethernet-phy@1 { |
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147 | reg = <1>; |
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148 | phy-mode = "sgmii"; |
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149 | }; |
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150 | }; |
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151 | |||
152 | ð0 { |
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153 | status = "okay"; |
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154 | |||
155 | pll-data = <0x82000101 0x80000101 0x80001313>; |
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156 | |||
157 | phy-handle = <&phy4>; |
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158 | phy-mode = "rgmii"; |
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159 | }; |
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160 | |||
161 | ð1 { |
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162 | status = "okay"; |
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163 | |||
164 | pll-data = <0x03000101 0x80000101 0x80001313>; |
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165 | |||
166 | phy-handle = <&phy1>; |
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167 | phy-mode = "sgmii"; |
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168 | }; |