OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | // SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
2 | #include <dt-bindings/clock/ath79-clk.h> |
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3 | #include "ath79.dtsi" |
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4 | |||
5 | / { |
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6 | compatible = "qca,qca9557"; |
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7 | |||
8 | #address-cells = <1>; |
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9 | #size-cells = <1>; |
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10 | |||
11 | cpus { |
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12 | #address-cells = <1>; |
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13 | #size-cells = <0>; |
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14 | |||
15 | cpu@0 { |
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16 | device_type = "cpu"; |
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17 | compatible = "mips,mips74Kc"; |
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18 | clocks = <&pll ATH79_CLK_CPU>; |
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19 | reg = <0>; |
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20 | }; |
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21 | }; |
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22 | |||
23 | extosc: ref { |
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24 | compatible = "fixed-clock"; |
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25 | #clock-cells = <0>; |
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26 | clock-output-names = "ref"; |
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27 | clock-frequency = <40000000>; |
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28 | }; |
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29 | |||
30 | ahb { |
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31 | apb { |
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32 | ddr_ctrl: memory-controller@18000000 { |
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33 | compatible = "qca,ar9557-ddr-controller", |
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34 | "qca,ar7240-ddr-controller"; |
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35 | reg = <0x18000000 0x100>; |
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36 | |||
37 | #qca,ddr-wb-channel-cells = <1>; |
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38 | }; |
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39 | |||
40 | uart: uart@18020000 { |
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41 | compatible = "ns16550a"; |
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42 | reg = <0x18020000 0x20>; |
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43 | |||
44 | interrupts = <3>; |
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45 | |||
46 | clocks = <&pll ATH79_CLK_REF>; |
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47 | clock-names = "uart"; |
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48 | |||
49 | reg-io-width = <4>; |
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50 | reg-shift = <2>; |
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51 | no-loopback-test; |
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52 | |||
53 | status = "disabled"; |
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54 | }; |
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55 | |||
56 | usb_phy0: usb-phy0@18030000 { |
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57 | compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy"; |
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58 | reg = <0x18030000 4>, <0x18030004 4>; |
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59 | |||
60 | reset-names = "usb-phy", "usb-suspend-override"; |
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61 | resets = <&rst 4>, <&rst 3>; |
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62 | |||
63 | #phy-cells = <0>; |
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64 | |||
65 | status = "disabled"; |
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66 | }; |
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67 | |||
68 | usb_phy1: usb-phy1@18030010 { |
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69 | compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy"; |
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70 | reg = <0x18030010 4>, <0x18030014 4>; |
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71 | |||
72 | reset-names = "usb-phy", "usb-suspend-override"; |
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73 | resets = <&rst2 4>, <&rst2 3>; |
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74 | |||
75 | #phy-cells = <0>; |
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76 | |||
77 | status = "disabled"; |
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78 | }; |
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79 | |||
80 | gpio: gpio@18040000 { |
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81 | compatible = "qca,ar9557-gpio", |
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82 | "qca,ar9340-gpio"; |
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83 | reg = <0x18040000 0x28>; |
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84 | |||
85 | interrupts = <2>; |
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86 | ngpios = <24>; |
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87 | |||
88 | gpio-controller; |
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89 | #gpio-cells = <2>; |
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90 | |||
91 | interrupt-controller; |
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92 | #interrupt-cells = <2>; |
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93 | }; |
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94 | |||
95 | pinmux: pinmux@1804002c { |
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96 | compatible = "pinctrl-single"; |
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97 | |||
98 | reg = <0x1804002c 0x44>; |
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99 | |||
100 | #size-cells = <0>; |
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101 | |||
102 | pinctrl-single,bit-per-mux; |
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103 | pinctrl-single,register-width = <32>; |
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104 | pinctrl-single,function-mask = <0x1>; |
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105 | #pinctrl-cells = <2>; |
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106 | |||
107 | jtag_disable_pins: pinmux_jtag_disable_pins { |
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108 | pinctrl-single,bits = <0x40 0x2 0x2>; |
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109 | }; |
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110 | }; |
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111 | |||
112 | pll: pll-controller@18050000 { |
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113 | compatible = "qca,ar9557-pll", |
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114 | "qca,qca9550-pll", "syscon"; |
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115 | reg = <0x18050000 0x50>; |
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116 | |||
117 | #clock-cells = <1>; |
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118 | clock-output-names = "cpu", "ddr", "ahb"; |
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119 | |||
120 | clocks = <&extosc>; |
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121 | }; |
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122 | |||
123 | wdt: wdt@18060008 { |
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124 | compatible = "qca,ar7130-wdt"; |
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125 | reg = <0x18060008 0x8>; |
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126 | |||
127 | interrupts = <4>; |
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128 | |||
129 | clocks = <&pll ATH79_CLK_AHB>; |
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130 | clock-names = "wdt"; |
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131 | }; |
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132 | |||
133 | rst: reset-controller@1806001c { |
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134 | compatible = "qca,qca9550-reset", |
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135 | "qca,ar7100-reset"; |
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136 | reg = <0x1806001c 0x4>; |
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137 | |||
138 | #reset-cells = <1>; |
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139 | interrupt-parent = <&cpuintc>; |
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140 | |||
141 | intc2: interrupt-controller2 { |
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142 | compatible = "qca,ar9340-intc"; |
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143 | |||
144 | interrupt-parent = <&cpuintc>; |
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145 | interrupts = <2>; |
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146 | |||
147 | interrupt-controller; |
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148 | #interrupt-cells = <1>; |
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149 | |||
150 | qca,int-status-addr = <0xac>; |
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151 | qca,pending-bits = <0xf>, /* wmac */ |
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152 | <0x1f0>; /* pcie rc 0 */ |
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153 | }; |
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154 | |||
155 | intc3: interrupt-controller3 { |
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156 | compatible = "qca,ar9340-intc"; |
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157 | |||
158 | interrupt-parent = <&cpuintc>; |
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159 | interrupts = <3>; |
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160 | |||
161 | interrupt-controller; |
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162 | #interrupt-cells = <1>; |
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163 | |||
164 | qca,int-status-addr = <0xac>; |
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165 | qca,pending-bits = <0x1f000>, /* pcie rc 1 */ |
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166 | <0x1000000>, /* usb1 */ |
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167 | <0x10000000>; /* usb2 */ |
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168 | }; |
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169 | }; |
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170 | |||
171 | rst2: reset-controller@180600c0 { |
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172 | compatible = "qca,qca9550-reset", |
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173 | "qca,ar7100-reset", |
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174 | "simple-bus"; |
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175 | reg = <0x180600c0 0x4>; |
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176 | |||
177 | #reset-cells = <1>; |
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178 | }; |
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179 | |||
180 | pcie0: pcie-controller@180c0000 { |
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181 | compatible = "qcom,ar7240-pci"; |
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182 | #address-cells = <3>; |
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183 | #size-cells = <2>; |
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184 | bus-range = <0x0 0x0>; |
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185 | reg = <0x180c0000 0x1000>, /* CRP */ |
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186 | <0x180f0000 0x100>, /* CTRL */ |
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187 | <0x14000000 0x1000>; /* CFG */ |
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188 | reg-names = "crp_base", "ctrl_base", "cfg_base"; |
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189 | ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000 /* pci memory */ |
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190 | 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */ |
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191 | interrupt-parent = <&intc2>; |
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192 | interrupts = <1>; |
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193 | |||
194 | interrupt-controller; |
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195 | #interrupt-cells = <1>; |
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196 | |||
197 | interrupt-map-mask = <0 0 0 1>; |
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198 | interrupt-map = <0 0 0 0 &pcie0 0>; |
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199 | status = "disabled"; |
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200 | }; |
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201 | |||
202 | pcie1: pcie-controller@18250000 { |
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203 | compatible = "qcom,ar7240-pci"; |
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204 | #address-cells = <3>; |
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205 | #size-cells = <2>; |
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206 | bus-range = <0x0 0x0>; |
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207 | reg = <0x18250000 0x1000>, /* CRP */ |
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208 | <0x18280000 0x100>, /* CTRL */ |
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209 | <0x16000000 0x1000>; /* CFG */ |
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210 | reg-names = "crp_base", "ctrl_base", "cfg_base"; |
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211 | ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */ |
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212 | 0x1000000 0 0x00000000 0x0000001 0 0x000001>; /* io space */ |
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213 | interrupt-parent = <&intc3>; |
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214 | interrupts = <0>; |
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215 | |||
216 | interrupt-controller; |
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217 | #interrupt-cells = <1>; |
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218 | |||
219 | interrupt-map-mask = <0 0 0 1>; |
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220 | interrupt-map = <0 0 0 0 &pcie1 0>; |
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221 | status = "disabled"; |
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222 | }; |
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223 | |||
224 | gmac: gmac@18070000 { |
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225 | compatible = "qca,qca9550-gmac"; |
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226 | reg = <0x18070000 0x14>; |
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227 | }; |
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228 | |||
229 | wmac: wmac@18100000 { |
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230 | compatible = "qca,qca9550-wmac"; |
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231 | reg = <0x18100000 0x10000>; |
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232 | |||
233 | interrupt-parent = <&intc2>; |
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234 | interrupts = <0>; |
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235 | |||
236 | status = "disabled"; |
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237 | }; |
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238 | }; |
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239 | |||
240 | usb0: usb@1b000000 { |
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241 | compatible = "generic-ehci"; |
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242 | reg = <0x1b000000 0x1fc>; |
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243 | |||
244 | interrupt-parent = <&intc3>; |
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245 | interrupts = <1>; |
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246 | resets = <&rst 5>; |
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247 | reset-names = "usb-host"; |
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248 | |||
249 | has-transaction-translator; |
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250 | caps-offset = <0x100>; |
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251 | |||
252 | phy-names = "usb-phy0"; |
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253 | phys = <&usb_phy0>; |
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254 | |||
255 | status = "disabled"; |
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256 | }; |
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257 | |||
258 | usb1: usb@1b400000 { |
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259 | compatible = "generic-ehci"; |
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260 | reg = <0x1b400000 0x1fc>; |
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261 | |||
262 | interrupt-parent = <&intc3>; |
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263 | interrupts = <2>; |
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264 | resets = <&rst2 5>; |
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265 | reset-names = "usb-host"; |
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266 | |||
267 | has-transaction-translator; |
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268 | caps-offset = <0x100>; |
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269 | |||
270 | phy-names = "usb-phy1"; |
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271 | phys = <&usb_phy1>; |
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272 | |||
273 | status = "disabled"; |
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274 | }; |
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275 | |||
276 | spi: spi@1f000000 { |
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277 | compatible = "qca,ar9557-spi", "qca,ar7100-spi"; |
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278 | reg = <0x1f000000 0x10>; |
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279 | |||
280 | clocks = <&pll ATH79_CLK_AHB>; |
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281 | clock-names = "ahb"; |
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282 | |||
283 | status = "disabled"; |
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284 | |||
285 | #address-cells = <1>; |
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286 | #size-cells = <0>; |
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287 | }; |
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288 | }; |
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289 | }; |
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290 | |||
291 | &mdio0 { |
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292 | resets = <&rst 22>; |
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293 | reset-names = "mdio"; |
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294 | }; |
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295 | |||
296 | ð0 { |
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297 | compatible = "qca,qca9550-eth", "syscon", "simple-mfd"; |
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298 | |||
299 | pll-reg = <0 0x28 0>; |
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300 | pll-handle = <&pll>; |
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301 | |||
302 | pll-data = <0x16000000 0x00000101 0x00001616>; |
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303 | phy-mode = "rgmii"; |
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304 | |||
305 | resets = <&rst 9>; |
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306 | reset-names = "mac"; |
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307 | }; |
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308 | |||
309 | &mdio1 { |
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310 | resets = <&rst 23>; |
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311 | reset-names = "mdio"; |
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312 | }; |
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313 | |||
314 | ð1 { |
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315 | compatible = "qca,qca9550-eth", "syscon", "simple-mfd"; |
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316 | |||
317 | pll-reg = <0 0x48 0>; |
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318 | pll-handle = <&pll>; |
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319 | |||
320 | pll-data = <0x16000000 0x00000101 0x00001616>; |
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321 | phy-mode = "sgmii"; |
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322 | |||
323 | resets = <&rst 13>; |
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324 | reset-names = "mac"; |
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325 | }; |