OpenWrt – Blame information for rev 2

Subversion Repositories:
Rev:
Rev Author Line No. Line
1 office 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2  
3 #include <dt-bindings/clock/ath79-clk.h>
4  
5 #include "ath79.dtsi"
6  
7 / {
8 compatible = "qca,ar9340";
9  
10 #address-cells = <1>;
11 #size-cells = <1>;
12  
13 chosen {
14 bootargs = "console=ttyS0,115200";
15 };
16  
17 cpus {
18 #address-cells = <1>;
19 #size-cells = <0>;
20  
21 cpu@0 {
22 device_type = "cpu";
23 compatible = "mips,mips74Kc";
24 clocks = <&pll ATH79_CLK_CPU>;
25 reg = <0>;
26 };
27 };
28  
29 clocks {
30 #address-cells = <1>;
31 #size-cells = <1>;
32 ranges;
33  
34 ref: ref {
35 #clock-cells = <0>;
36 compatible = "fixed-clock";
37 clock-output-names = "ref";
38 };
39 };
40  
41 ahb {
42 compatible = "simple-bus";
43 ranges;
44  
45 #address-cells = <1>;
46 #size-cells = <1>;
47  
48 apb: apb {
49 compatible = "simple-bus";
50 ranges;
51  
52 #address-cells = <1>;
53 #size-cells = <1>;
54  
55 ddr_ctrl: memory-controller@18000000 {
56 compatible = "qca,ar9340-ddr-controller",
57 "qca,ar7240-ddr-controller";
58 reg = <0x18000000 0x12c>;
59  
60 #qca,ddr-wb-channel-cells = <1>;
61 };
62  
63 uart: uart@18020000 {
64 compatible = "ns16550a";
65 reg = <0x18020000 0x2c>;
66  
67 interrupts = <3>;
68  
69 clocks = <&pll ATH79_CLK_REF>;
70 clock-names = "uart";
71  
72 reg-io-width = <4>;
73 reg-shift = <2>;
74 no-loopback-test;
75  
76 status = "disabled";
77 };
78  
79 gpio: gpio@18040000 {
80 compatible = "qca,ar9340-gpio";
81 reg = <0x18040000 0x2c>;
82  
83 interrupts = <2>;
84 ngpios = <23>;
85  
86 gpio-controller;
87 #gpio-cells = <2>;
88  
89 interrupt-controller;
90 #interrupt-cells = <2>;
91 };
92  
93 pinmux: pinmux@1804002c {
94 compatible = "pinctrl-single";
95  
96 reg = <0x1804002c 0x44>;
97  
98 #size-cells = <0>;
99  
100 pinctrl-single,bit-per-mux;
101 pinctrl-single,register-width = <32>;
102 pinctrl-single,function-mask = <0x1>;
103 #pinctrl-cells = <2>;
104  
105 jtag_disable_pins: pinmux_jtag_disable_pins {
106 pinctrl-single,bits = <0x40 0x2 0x2>;
107 };
108 };
109  
110 pll: pll-controller@18050000 {
111 compatible = "qca,ar9340-pll", "syscon";
112 reg = <0x18050000 0x4c>;
113  
114 #clock-cells = <1>;
115 clocks = <&ref>;
116 clock-names = "ref";
117 clock-output-names = "cpu", "ddr", "ahb";
118 };
119  
120 wdt: wdt@18060008 {
121 compatible = "qca,ar9340-wdt", "qca,ar7130-wdt";
122 reg = <0x18060008 0x8>;
123  
124 interrupts = <4>;
125  
126 clocks = <&pll ATH79_CLK_AHB>;
127 clock-names = "wdt";
128 };
129  
130 rst: reset-controller@1806001c {
131 compatible = "qca,ar9340-reset", "qca,ar7100-reset";
132 reg = <0x1806001c 0x4>;
133  
134 #reset-cells = <1>;
135 };
136  
137 gmac: gmac@18070000 {
138 compatible = "qca,ar9340-gmac";
139 reg = <0x18070000 0x14>;
140 };
141  
142 wmac: wmac@18100000 {
143 compatible = "qca,ar9340-wmac";
144 reg = <0x18100000 0x20000>;
145  
146 status = "disabled";
147 };
148 };
149  
150 usb: usb@1b000000 {
151 compatible = "generic-ehci";
152 reg = <0x1b000000 0x1d8>;
153  
154 interrupts = <3>;
155 resets = <&rst 5>;
156 reset-names = "usb-host";
157  
158 has-transaction-translator;
159 caps-offset = <0x100>;
160  
161 phy-names = "usb-phy";
162 phys = <&usb_phy>;
163  
164 status = "disabled";
165 };
166  
167 spi: spi@1f000000 {
168 compatible = "qca,ar9340-spi", "qca,ar7100-spi";
169 reg = <0x1f000000 0x1c>;
170  
171 clocks = <&pll ATH79_CLK_AHB>;
172 clock-names = "ahb";
173  
174 #address-cells = <1>;
175 #size-cells = <0>;
176  
177 status = "disabled";
178 };
179 };
180  
181 usb_phy: usb-phy {
182 compatible = "qca,ar9340-usb-phy", "qca,ar7200-usb-phy";
183  
184 reset-names = "usb-phy", "usb-suspend-override";
185 resets = <&rst 4>, <&rst 3>;
186  
187 #phy-cells = <0>;
188  
189 status = "disabled";
190 };
191 };
192  
193 &mdio0 {
194 compatible = "qca,ar9340-mdio";
195 resets = <&rst 22>;
196 reset-names = "mdio";
197 };
198  
199 &eth0 {
200 compatible = "qca,ar9340-eth", "syscon", "simple-mfd";
201  
202 pll-data = <0x16000000 0x00000101 0x00001616>;
203 pll-reg = <0x4 0x2c 17>;
204 pll-handle = <&pll>;
205  
206 resets = <&rst 9>;
207 reset-names = "mac";
208 };
209  
210 &mdio1 {
211 status = "okay";
212  
213 compatible = "qca,ar9340-mdio";
214 resets = <&rst 23>;
215 reset-names = "mdio";
216 builtin-switch;
217  
218 builtin_switch: switch0@1f {
219 compatible = "qca,ar8229-builtin";
220  
221 reg = <0x1f>;
222 resets = <&rst 8>;
223 reset-names = "switch";
224 phy-mode = "gmii";
225 phy4-mii-enable;
226  
227 mdio-bus {
228 #address-cells = <1>;
229 #size-cells = <0>;
230  
231 swphy0: ethernet-phy@0 {
232 reg = <0>;
233 phy-mode = "mii";
234 };
235  
236 swphy4: ethernet-phy@4 {
237 reg = <4>;
238 phy-mode = "mii";
239 };
240 };
241 };
242 };
243  
244 &eth1 {
245 compatible = "qca,ar9340-eth", "syscon", "simple-mfd";
246  
247 resets = <&rst 13>;
248 reset-names = "mac";
249 phy-mode = "gmii";
250  
251 fixed-link {
252 speed = <1000>;
253 full-duplex;
254 };
255 };