OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | // SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
2 | |||
3 | #include <dt-bindings/gpio/gpio.h> |
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4 | #include <dt-bindings/input/input.h> |
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5 | |||
6 | #include "ar9344.dtsi" |
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7 | |||
8 | / { |
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9 | aliases { |
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10 | led-boot = &system; |
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11 | led-failsafe = &system; |
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12 | led-running = &system; |
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13 | led-upgrade = &system; |
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14 | }; |
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15 | |||
16 | leds { |
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17 | compatible = "gpio-leds"; |
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18 | |||
19 | usb1 { |
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20 | label = "tp-link:green:usb1"; |
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21 | gpios = <&gpio 11 GPIO_ACTIVE_LOW>; |
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22 | trigger-sources = <&hub_port1>; |
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23 | linux,default-trigger = "usbport"; |
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24 | }; |
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25 | |||
26 | usb2 { |
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27 | label = "tp-link:green:usb2"; |
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28 | gpios = <&gpio 12 GPIO_ACTIVE_LOW>; |
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29 | trigger-sources = <&hub_port2>; |
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30 | linux,default-trigger = "usbport"; |
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31 | }; |
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32 | |||
33 | wlan2g { |
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34 | label = "tp-link:green:wlan2g"; |
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35 | gpios = <&gpio 13 GPIO_ACTIVE_LOW>; |
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36 | linux,default-trigger = "phy0tpt"; |
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37 | }; |
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38 | |||
39 | system: system { |
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40 | label = "tp-link:green:system"; |
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41 | gpios = <&gpio 14 GPIO_ACTIVE_LOW>; |
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42 | default-state = "on"; |
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43 | }; |
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44 | |||
45 | qss { |
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46 | label = "tp-link:green:qss"; |
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47 | gpios = <&gpio 15 GPIO_ACTIVE_LOW>; |
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48 | }; |
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49 | }; |
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50 | |||
51 | ath9k-leds { |
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52 | compatible = "gpio-leds"; |
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53 | |||
54 | wlan5g { |
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55 | label = "tp-link:green:wlan5g"; |
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56 | gpios = <&ath9k 0 GPIO_ACTIVE_LOW>; |
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57 | linux,default-trigger = "phy1tpt"; |
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58 | }; |
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59 | }; |
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60 | |||
61 | keys { |
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62 | compatible = "gpio-keys-polled"; |
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63 | poll-interval = <20>; |
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64 | |||
65 | reset { |
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66 | linux,code = <KEY_RESTART>; |
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67 | gpios = <&gpio 16 GPIO_ACTIVE_LOW>; |
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68 | debounce-interval = <60>; |
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69 | }; |
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70 | |||
71 | wifi { |
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72 | linux,code = <KEY_RFKILL>; |
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73 | linux,input-type = <EV_SW>; |
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74 | gpios = <&gpio 17 GPIO_ACTIVE_LOW>; |
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75 | debounce-interval = <60>; |
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76 | }; |
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77 | }; |
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78 | |||
79 | gpio-export { |
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80 | compatible = "gpio-export"; |
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81 | |||
82 | gpio_usb1_power { |
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83 | gpio-export,name = "tp-link:power:usb1"; |
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84 | gpio-export,output = <1>; |
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85 | gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; |
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86 | }; |
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87 | |||
88 | gpio_usb2_power { |
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89 | gpio-export,name = "tp-link:power:usb2"; |
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90 | gpio-export,output = <1>; |
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91 | gpios = <&gpio 21 GPIO_ACTIVE_HIGH>; |
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92 | }; |
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93 | |||
94 | gpio_ext_lna0 { |
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95 | gpio-export,name = "tp-link:ext:lna0"; |
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96 | gpio-export,output = <1>; |
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97 | gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; |
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98 | }; |
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99 | |||
100 | gpio_ext_lna1 { |
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101 | gpio-export,name = "tp-link:ext:lna1"; |
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102 | gpio-export,output = <1>; |
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103 | gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; |
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104 | }; |
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105 | }; |
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106 | }; |
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107 | |||
108 | &ref { |
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109 | clock-frequency = <40000000>; |
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110 | }; |
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111 | |||
112 | &uart { |
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113 | status = "okay"; |
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114 | }; |
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115 | |||
116 | &gpio { |
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117 | status = "okay"; |
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118 | }; |
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119 | |||
120 | &spi { |
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121 | num-cs = <1>; |
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122 | |||
123 | status = "okay"; |
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124 | |||
125 | flash@0 { |
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126 | compatible = "jedec,spi-nor"; |
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127 | reg = <0>; |
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128 | spi-max-frequency = <25000000>; |
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129 | |||
130 | partitions { |
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131 | compatible = "fixed-partitions"; |
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132 | #address-cells = <1>; |
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133 | #size-cells = <1>; |
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134 | |||
135 | uboot: partition@0 { |
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136 | label = "u-boot"; |
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137 | reg = <0x000000 0x020000>; |
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138 | read-only; |
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139 | }; |
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140 | |||
141 | partition@20000 { |
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142 | compatible = "tplink,firmware"; |
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143 | label = "firmware"; |
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144 | reg = <0x020000 0x7d0000>; |
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145 | }; |
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146 | |||
147 | art: partition@7f0000 { |
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148 | label = "art"; |
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149 | reg = <0x7f0000 0x010000>; |
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150 | read-only; |
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151 | }; |
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152 | }; |
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153 | }; |
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154 | }; |
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155 | |||
156 | &usb { |
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157 | #address-cells = <1>; |
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158 | #size-cells = <0>; |
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159 | status = "okay"; |
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160 | |||
161 | port@1 { |
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162 | #address-cells = <1>; |
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163 | #size-cells = <0>; |
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164 | reg = <1>; |
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165 | #trigger-source-cells = <0>; |
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166 | |||
167 | hub_port1: port@1 { |
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168 | reg = <1>; |
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169 | #trigger-source-cells = <0>; |
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170 | }; |
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171 | |||
172 | hub_port2: port@2 { |
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173 | reg = <2>; |
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174 | #trigger-source-cells = <0>; |
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175 | }; |
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176 | }; |
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177 | }; |
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178 | |||
179 | &usb_phy { |
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180 | status = "okay"; |
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181 | }; |
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182 | |||
183 | &pcie { |
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184 | status = "okay"; |
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185 | |||
186 | ath9k: wifi@0,0 { |
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187 | compatible = "pci168c,0033"; |
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188 | reg = <0x0000 0 0 0 0>; |
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189 | mtd-mac-address = <&uboot 0x1fc00>; |
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190 | qca,no-eeprom; |
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191 | #gpio-cells = <2>; |
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192 | gpio-controller; |
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193 | }; |
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194 | }; |
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195 | |||
196 | &wmac { |
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197 | status = "okay"; |
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198 | |||
199 | mtd-cal-data = <&art 0x1000>; |
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200 | mtd-mac-address = <&uboot 0x1fc00>; |
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201 | mtd-mac-address-increment = <(-1)>; |
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202 | }; |
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203 | |||
204 | &mdio0 { |
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205 | status = "okay"; |
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206 | |||
207 | phy-mask = <0>; |
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208 | |||
209 | phy0: ethernet-phy@0 { |
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210 | reg = <0>; |
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211 | phy-mode = "rgmii"; |
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212 | |||
213 | qca,ar8327-initvals = < |
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214 | 0x04 0x07600000 /* PORT0 PAD MODE CTRL */ |
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215 | 0x10 0x80000080 /* POWER_ON_STRIP */ |
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216 | 0x50 0xc737c737 /* LED_CTRL0 */ |
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217 | 0x54 0x00000000 /* LED_CTRL1 */ |
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218 | 0x58 0x00000000 /* LED_CTRL2 */ |
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219 | 0x5c 0x0030c300 /* LED_CTRL3 */ |
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220 | 0x7c 0x0000007e /* PORT0_STATUS */ |
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221 | >; |
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222 | }; |
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223 | }; |
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224 | |||
225 | ð0 { |
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226 | status = "okay"; |
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227 | |||
228 | /* default for ar934x, except for 1000M */ |
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229 | pll-data = <0x06000000 0x00000101 0x00001616>; |
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230 | |||
231 | mtd-mac-address = <&uboot 0x1fc00>; |
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232 | mtd-mac-address-increment = <(-2)>; |
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233 | |||
234 | phy-mode = "rgmii"; |
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235 | phy-handle = <&phy0>; |
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236 | }; |