OpenWrt – Blame information for rev 2

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1 office 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
3 #include "ath79.dtsi"
4  
5 / {
6 compatible = "qca,ar9330";
7  
8 #address-cells = <1>;
9 #size-cells = <1>;
10  
11 cpus {
12 #address-cells = <1>;
13 #size-cells = <0>;
14  
15 cpu@0 {
16 device_type = "cpu";
17 compatible = "mips,mips24Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
19 reg = <0>;
20 };
21 };
22  
23 chosen {
24 bootargs = "console=ttyATH0,115200";
25 };
26  
27 ahb {
28 apb {
29 ddr_ctrl: memory-controller@18000000 {
30 compatible = "qca,ar7240-ddr-controller";
31 reg = <0x18000000 0x100>;
32  
33 #qca,ddr-wb-channel-cells = <1>;
34 };
35  
36 uart: uart@18020000 {
37 compatible = "qca,ar9330-uart";
38 reg = <0x18020000 0x14>;
39  
40 interrupts = <3>;
41  
42 clocks = <&pll ATH79_CLK_REF>;
43 clock-names = "uart";
44  
45 status = "disabled";
46 };
47  
48 gpio: gpio@18040000 {
49 compatible = "qca,ar7100-gpio";
50 reg = <0x18040000 0x34>;
51 interrupts = <2>;
52  
53 ngpios = <30>;
54  
55 gpio-controller;
56 #gpio-cells = <2>;
57  
58 interrupt-controller;
59 #interrupt-cells = <2>;
60  
61 status = "disabled";
62 };
63  
64 pinmux: pinmux@18040028 {
65 compatible = "pinctrl-single";
66 reg = <0x18040028 0x8>;
67  
68 pinctrl-single,bit-per-mux;
69 pinctrl-single,register-width = <32>;
70 pinctrl-single,function-mask = <0x1>;
71 #pinctrl-cells = <2>;
72  
73 jtag_disable_pins: pinmux_jtag_disable_pins {
74 pinctrl-single,bits = <0x0 0x1 0x1>;
75 };
76  
77 switch_led_pins: pinmux_switch_led_pins {
78 pinctrl-single,bits = <0x0 0x1f 0xf8>;
79 };
80 };
81  
82 pll: pll-controller@18050000 {
83 compatible = "qca,ar9330-pll";
84 reg = <0x18050000 0x100>;
85  
86 #clock-cells = <1>;
87 };
88  
89 rst: reset-controller@1806001c {
90 compatible = "qca,ar7100-reset";
91 reg = <0x1806001c 0x4>;
92  
93 #reset-cells = <1>;
94 };
95 };
96  
97 usb: usb@1b000000 {
98 compatible = "chipidea,usb2";
99 reg = <0x1b000000 0x200>;
100  
101 interrupts = <3>;
102 resets = <&rst 5>;
103 reset-names = "usb-host";
104  
105 phy-names = "usb-phy";
106 phys = <&usb_phy>;
107  
108 status = "disabled";
109 };
110  
111 spi: spi@1f000000 {
112 compatible = "qca,ar7100-spi";
113 reg = <0x1f000000 0x10>;
114  
115 clocks = <&pll ATH79_CLK_AHB>;
116 clock-names = "ahb";
117  
118 #address-cells = <1>;
119 #size-cells = <0>;
120  
121 status = "disabled";
122 };
123  
124 gmac: gmac@18070000 {
125 compatible = "qca,ar9330-gmac";
126 reg = <0x18070000 0x4>;
127 };
128  
129 wmac: wmac@18100000 {
130 compatible = "qca,ar9330-wmac";
131 reg = <0x18100000 0x20000>;
132  
133 interrupts = <2>;
134  
135 status = "disabled";
136 };
137 };
138  
139 usb_phy: usb-phy {
140 compatible = "qca,ar7200-usb-phy";
141  
142 reset-names = "usb-phy", "usb-suspend-override";
143 resets = <&rst 4>, <&rst 3>;
144  
145 #phy-cells = <0>;
146  
147 status = "disabled";
148 };
149 };
150  
151 &cpuintc {
152 qca,ddr-wb-channel-interrupts = <2>, <3>;
153 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
154 };
155  
156 &eth0 {
157 compatible = "qca,ar9330-eth", "syscon";
158  
159 pll-data = <0x00110000 0x00001099 0x00991099>;
160  
161 resets = <&rst 9>;
162 reset-names = "mac";
163 phy-mode = "mii";
164 phy-handle = <&swphy4>;
165 };
166  
167 &mdio1 {
168 status = "okay";
169 compatible = "qca,ar9330-mdio";
170  
171 resets = <&rst 23>;
172 reset-names = "mdio";
173 builtin-switch;
174  
175 builtin_switch: switch0@1f {
176 compatible = "qca,ar8216-builtin";
177 reg = <0x1f>;
178 resets = <&rst 8>;
179 reset-names = "switch";
180  
181 mdio-bus {
182 #address-cells = <1>;
183 #size-cells = <0>;
184  
185 swphy4: ethernet-phy@4 {
186 reg = <4>;
187 phy-mode = "mii";
188 };
189 };
190 };
191 };
192  
193 &eth1 {
194 compatible = "qca,ar9330-eth", "syscon", "simple-mfd";
195  
196 pll-data = <0x00110000 0x00001099 0x00991099>;
197 phy-mode = "gmii";
198  
199 resets = <&rst 13>;
200 reset-names = "mac";
201  
202 fixed-link {
203 speed = <1000>;
204 full-duplex;
205 };
206 };