OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | // SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
2 | /dts-v1/; |
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3 | |||
4 | #include <dt-bindings/gpio/gpio.h> |
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5 | #include <dt-bindings/input/input.h> |
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6 | |||
7 | #include "ar7100.dtsi" |
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8 | |||
9 | / { |
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10 | compatible = "dlink,dir-825-b1", "qca,ar7161"; |
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11 | model = "D-Link DIR825B1"; |
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12 | |||
13 | aliases { |
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14 | led-boot = &orange_power; |
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15 | led-failsafe = &orange_power; |
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16 | led-running = &blue_power; |
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17 | led-upgrade = &orange_power; |
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18 | }; |
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19 | |||
20 | chosen { |
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21 | bootargs = "console=ttyS0,115200"; |
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22 | }; |
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23 | |||
24 | extosc: ref { |
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25 | compatible = "fixed-clock"; |
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26 | #clock-cells = <0>; |
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27 | clock-output-names = "ref"; |
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28 | clock-frequency = <40000000>; |
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29 | }; |
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30 | |||
31 | leds { |
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32 | compatible = "gpio-leds"; |
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33 | blue_usb { |
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34 | label = "d-link:blue:usb"; |
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35 | gpios = <&gpio 0 GPIO_ACTIVE_LOW>; |
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36 | trigger-sources = <&usb_ochi_port>, <&usb_echi_port>; |
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37 | linux,default-trigger = "usbport"; |
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38 | }; |
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39 | |||
40 | orange_power: orange_power { |
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41 | label = "d-link:orange:power"; |
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42 | gpios = <&gpio 1 GPIO_ACTIVE_LOW>; |
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43 | default-state = "on"; |
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44 | }; |
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45 | |||
46 | blue_power: blue_power { |
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47 | label = "d-link:blue:power"; |
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48 | gpios = <&gpio 2 GPIO_ACTIVE_LOW>; |
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49 | }; |
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50 | |||
51 | blue_wps { |
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52 | label = "d-link:blue:wps"; |
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53 | gpios = <&gpio 4 GPIO_ACTIVE_LOW>; |
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54 | }; |
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55 | |||
56 | orange_planet { |
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57 | label = "d-link:orange:planet"; |
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58 | gpios = <&gpio 6 GPIO_ACTIVE_LOW>; |
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59 | }; |
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60 | |||
61 | blue_planet { |
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62 | label = "d-link:blue:planet"; |
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63 | gpios = <&gpio 11 GPIO_ACTIVE_LOW>; |
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64 | }; |
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65 | }; |
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66 | |||
67 | ath9k-leds { |
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68 | compatible = "gpio-leds"; |
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69 | |||
70 | wlan2g { |
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71 | label = "d-link:blue:wlan2g"; |
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72 | gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>; |
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73 | linux,default-trigger = "phy0tpt"; |
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74 | }; |
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75 | |||
76 | wlan5g { |
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77 | label = "d-link:blue:wlan5g"; |
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78 | gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>; |
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79 | linux,default-trigger = "phy1tpt"; |
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80 | }; |
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81 | }; |
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82 | |||
83 | keys { |
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84 | compatible = "gpio-keys-polled"; |
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85 | poll-interval = <20>; |
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86 | |||
87 | reset { |
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88 | label = "reset"; |
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89 | linux,code = <KEY_RESTART>; |
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90 | gpios = <&gpio 3 GPIO_ACTIVE_LOW>; |
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91 | debounce-interval = <60>; |
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92 | }; |
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93 | |||
94 | wps { |
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95 | label = "wps"; |
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96 | linux,code = <KEY_WPS_BUTTON>; |
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97 | gpios = <&gpio 8 GPIO_ACTIVE_LOW>; |
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98 | debounce-interval = <60>; |
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99 | }; |
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100 | }; |
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101 | |||
102 | rtl8366s { |
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103 | compatible = "realtek,rtl8366s"; |
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104 | gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>; |
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105 | gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>; |
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106 | realtek,initvals = <0x06 0x0108>; |
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107 | |||
108 | mdio-bus { |
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109 | #address-cells = <1>; |
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110 | #size-cells = <0>; |
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111 | status = "okay"; |
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112 | |||
113 | phy-mask = <0x10>; |
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114 | |||
115 | phy4: ethernet-phy@4 { |
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116 | reg = <4>; |
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117 | phy-mode = "rgmii"; |
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118 | }; |
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119 | }; |
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120 | }; |
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121 | }; |
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122 | |||
123 | |||
124 | &usb1 { |
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125 | #address-cells = <1>; |
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126 | #size-cells = <0>; |
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127 | status = "okay"; |
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128 | |||
129 | usb_ochi_port: port@1 { |
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130 | reg = <1>; |
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131 | #trigger-source-cells = <0>; |
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132 | }; |
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133 | }; |
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134 | |||
135 | &usb2 { |
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136 | #address-cells = <1>; |
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137 | #size-cells = <0>; |
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138 | status = "okay"; |
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139 | |||
140 | usb_echi_port: port@1 { |
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141 | reg = <1>; |
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142 | #trigger-source-cells = <0>; |
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143 | }; |
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144 | }; |
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145 | |||
146 | &usb_phy { |
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147 | status = "okay"; |
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148 | }; |
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149 | |||
150 | &pcie0 { |
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151 | status = "okay"; |
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152 | |||
153 | ath9k0: wifi@0,11 { |
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154 | compatible = "pci168c,0029"; |
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155 | reg = <0x8800 0 0 0 0>; |
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156 | qca,no-eeprom; |
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157 | #gpio-cells = <2>; |
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158 | gpio-controller; |
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159 | }; |
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160 | |||
161 | ath9k1: wifi@0,12 { |
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162 | compatible = "pci168c,0029"; |
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163 | reg = <0x9000 0 0 0 0>; |
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164 | qca,no-eeprom; |
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165 | #gpio-cells = <2>; |
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166 | gpio-controller; |
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167 | }; |
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168 | }; |
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169 | |||
170 | &uart { |
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171 | status = "okay"; |
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172 | }; |
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173 | |||
174 | &pll { |
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175 | clocks = <&extosc>; |
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176 | }; |
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177 | |||
178 | &spi { |
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179 | status = "okay"; |
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180 | num-cs = <1>; |
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181 | |||
182 | flash@0 { |
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183 | compatible = "jedec,spi-nor"; |
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184 | reg = <0>; |
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185 | spi-max-frequency = <25000000>; |
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186 | |||
187 | partitions { |
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188 | compatible = "fixed-partitions"; |
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189 | #address-cells = <1>; |
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190 | #size-cells = <1>; |
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191 | |||
192 | partition@0 { |
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193 | label = "u-boot"; |
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194 | reg = <0x000000 0x040000>; |
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195 | read-only; |
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196 | }; |
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197 | |||
198 | partition@40000 { |
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199 | label = "config"; |
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200 | reg = <0x040000 0x010000>; |
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201 | read-only; |
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202 | }; |
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203 | |||
204 | partition@50000 { |
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205 | compatible = "denx,uimage"; |
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206 | label = "firmware"; |
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207 | reg = <0x050000 0x610000>; |
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208 | }; |
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209 | |||
210 | caldata: partition@60000 { |
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211 | label = "caldata"; |
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212 | reg = <0x660000 0x010000>; |
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213 | read-only; |
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214 | }; |
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215 | |||
216 | partition@670000 { |
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217 | label = "unknown"; |
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218 | reg = <0x670000 0x190000>; |
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219 | read-only; |
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220 | }; |
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221 | }; |
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222 | }; |
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223 | }; |
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224 | |||
225 | |||
226 | ð0 { |
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227 | status = "okay"; |
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228 | pll-data = <0x11110000 0x00001099 0x00991099>; |
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229 | |||
230 | fixed-link { |
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231 | speed = <1000>; |
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232 | full-duplex; |
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233 | }; |
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234 | }; |
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235 | |||
236 | ð1 { |
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237 | status = "okay"; |
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238 | pll-data = <0x11110000 0x00001099 0x00991099>; |
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239 | |||
240 | phy-handle = <&phy4>; |
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241 | }; |