OpenWrt – Blame information for rev 1

Subversion Repositories:
Rev:
Rev Author Line No. Line
1 office 1 --- a/drivers/spi/spi-ath79.c
2 +++ b/drivers/spi/spi-ath79.c
3 @@ -102,9 +102,6 @@ static void ath79_spi_enable(struct ath7
4 /* save CTRL register */
5 sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL);
6 sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC);
7 -
8 - /* TODO: setup speed? */
9 - ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
10 }
11  
12 static void ath79_spi_disable(struct ath79_spi *sp)
13 @@ -204,6 +201,38 @@ static u32 ath79_spi_txrx_mode0(struct s
14 return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
15 }
16  
17 +static bool ath79_spi_flash_read_supported(struct spi_device *spi)
18 +{
19 + if (spi->chip_select || gpio_is_valid(spi->cs_gpio))
20 + return false;
21 +
22 + return true;
23 +}
24 +
25 +static int ath79_spi_read_flash_data(struct spi_device *spi,
26 + struct spi_flash_read_message *msg)
27 +{
28 + struct ath79_spi *sp = ath79_spidev_to_sp(spi);
29 +
30 + if (msg->addr_width > 3)
31 + return -EOPNOTSUPP;
32 +
33 + /* disable GPIO mode */
34 + ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
35 +
36 + memcpy_fromio(msg->buf, sp->base + msg->from, msg->len);
37 +
38 + /* enable GPIO mode */
39 + ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
40 +
41 + /* restore IOC register */
42 + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
43 +
44 + msg->retlen = msg->len;
45 +
46 + return 0;
47 +}
48 +
49 static int ath79_spi_probe(struct platform_device *pdev)
50 {
51 struct spi_master *master;
52 @@ -233,6 +262,8 @@ static int ath79_spi_probe(struct platfo
53 master->num_chipselect = pdata->num_chipselect;
54 master->cs_gpios = pdata->cs_gpios;
55 }
56 + master->spi_flash_read = ath79_spi_read_flash_data;
57 + master->flash_read_supported = ath79_spi_flash_read_supported;
58  
59 sp->bitbang.master = master;
60 sp->bitbang.chipselect = ath79_spi_chipselect;