OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * MikroTik RouterBOARD SXT Lite support |
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3 | * |
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4 | * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be> |
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5 | * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> |
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6 | * Copyright (C) 2013 Vyacheslav Adamanov <adamanov@gmail.com> |
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7 | * |
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8 | * This program is free software; you can redistribute it and/or modify it |
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9 | * under the terms of the GNU General Public License version 2 as published |
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10 | * by the Free Software Foundation. |
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11 | */ |
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12 | |||
13 | #define pr_fmt(fmt) "sxtlite: " fmt |
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14 | |||
15 | #include <linux/version.h> |
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16 | #include <linux/phy.h> |
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17 | #include <linux/delay.h> |
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18 | #include <linux/platform_device.h> |
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19 | #include <linux/ath9k_platform.h> |
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20 | #include <linux/mtd/mtd.h> |
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21 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0) |
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22 | #include <linux/mtd/nand.h> |
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23 | #else |
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24 | #include <linux/mtd/rawnand.h> |
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25 | #endif |
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26 | #include <linux/mtd/partitions.h> |
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27 | #include <linux/spi/spi.h> |
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28 | #include <linux/spi/flash.h> |
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29 | #include <linux/rle.h> |
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30 | #include <linux/routerboot.h> |
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31 | #include <linux/gpio.h> |
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32 | #include <linux/version.h> |
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33 | |||
34 | #include <asm/mach-ath79/ath79.h> |
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35 | #include <asm/mach-ath79/ar71xx_regs.h> |
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36 | #include "common.h" |
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37 | #include "dev-ap9x-pci.h" |
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38 | #include "dev-gpio-buttons.h" |
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39 | #include "dev-leds-gpio.h" |
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40 | #include "dev-eth.h" |
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41 | #include "dev-m25p80.h" |
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42 | #include "dev-nfc.h" |
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43 | #include "dev-wmac.h" |
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44 | #include "dev-usb.h" |
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45 | #include "machtypes.h" |
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46 | #include "routerboot.h" |
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47 | #include <linux/ar8216_platform.h> |
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48 | |||
49 | #define SXTLITE_GPIO_NAND_NCE 14 |
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50 | #define SXTLITE_GPIO_LED_USER 3 |
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51 | #define SXTLITE_GPIO_LED_1 13 |
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52 | #define SXTLITE_GPIO_LED_2 12 |
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53 | #define SXTLITE_GPIO_LED_3 4 |
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54 | #define SXTLITE_GPIO_LED_4 21 |
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55 | #define SXTLITE_GPIO_LED_5 18 |
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56 | #define SXTLITE_GPIO_LED_POWER 11 |
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57 | |||
58 | #define SXTLITE_GPIO_BUZZER 19 |
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59 | |||
60 | #define SXTLITE_GPIO_BTN_RESET 15 |
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61 | |||
62 | #define SXTLITE_KEYS_POLL_INTERVAL 20 |
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63 | #define SXTLITE_KEYS_DEBOUNCE_INTERVAL (3 * SXTLITE_KEYS_POLL_INTERVAL) |
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64 | |||
65 | static struct mtd_partition rbsxtlite_nand_partitions[] = { |
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66 | { |
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67 | .name = "booter", |
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68 | .offset = 0, |
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69 | .size = (256 * 1024), |
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70 | .mask_flags = MTD_WRITEABLE, |
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71 | }, |
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72 | { |
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73 | .name = "kernel", |
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74 | .offset = (256 * 1024), |
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75 | .size = (4 * 1024 * 1024) - (256 * 1024), |
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76 | }, |
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77 | { |
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78 | .name = "ubi", |
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79 | .offset = MTDPART_OFS_NXTBLK, |
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80 | .size = MTDPART_SIZ_FULL, |
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81 | }, |
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82 | }; |
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83 | |||
84 | static struct gpio_led rbsxtlite_leds_gpio[] __initdata = { |
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85 | { |
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86 | .name = "rb:green:user", |
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87 | .gpio = SXTLITE_GPIO_LED_USER, |
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88 | .active_low = 1, |
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89 | }, |
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90 | { |
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91 | .name = "rb:green:led1", |
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92 | .gpio = SXTLITE_GPIO_LED_1, |
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93 | .active_low = 1, |
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94 | }, |
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95 | { |
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96 | .name = "rb:green:led2", |
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97 | .gpio = SXTLITE_GPIO_LED_2, |
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98 | .active_low = 1, |
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99 | }, |
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100 | { |
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101 | .name = "rb:green:led3", |
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102 | .gpio = SXTLITE_GPIO_LED_3, |
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103 | .active_low = 1, |
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104 | }, |
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105 | { |
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106 | .name = "rb:green:led4", |
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107 | .gpio = SXTLITE_GPIO_LED_4, |
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108 | .active_low = 1, |
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109 | }, |
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110 | { |
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111 | .name = "rb:green:led5", |
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112 | .gpio = SXTLITE_GPIO_LED_5, |
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113 | .active_low = 1, |
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114 | }, |
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115 | { |
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116 | .name = "rb:green:power", |
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117 | .gpio = SXTLITE_GPIO_LED_POWER, |
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118 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
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119 | }, |
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120 | }; |
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121 | |||
122 | static struct gpio_keys_button rbsxtlite_gpio_keys[] __initdata = { |
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123 | { |
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124 | .desc = "Reset button", |
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125 | .type = EV_KEY, |
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126 | .code = KEY_RESTART, |
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127 | .debounce_interval = SXTLITE_KEYS_DEBOUNCE_INTERVAL, |
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128 | .gpio = SXTLITE_GPIO_BTN_RESET, |
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129 | .active_low = 0, |
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130 | }, |
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131 | }; |
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132 | |||
133 | static int __init rbsxtlite_rbinfo_init(void) |
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134 | { |
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135 | const struct rb_info *info; |
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136 | |||
137 | info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000); |
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138 | if (!info) |
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139 | return -EINVAL; |
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140 | return 0; |
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141 | |||
142 | } |
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143 | |||
144 | void __init rbsxtlite_wlan_init(void) |
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145 | { |
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146 | char *art_buf; |
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147 | u8 wlan_mac[ETH_ALEN]; |
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148 | |||
149 | art_buf = rb_get_wlan_data(); |
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150 | if (art_buf == NULL) |
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151 | return; |
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152 | |||
153 | ath79_init_mac(wlan_mac, ath79_mac_base, 1); |
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154 | ath79_register_wmac(art_buf + 0x1000, wlan_mac); |
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155 | |||
156 | kfree(art_buf); |
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157 | } |
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158 | |||
159 | static void rbsxtlite_nand_select_chip(int chip_no) |
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160 | { |
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161 | switch (chip_no) { |
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162 | case 0: |
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163 | gpio_set_value(SXTLITE_GPIO_NAND_NCE, 0); |
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164 | break; |
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165 | default: |
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166 | gpio_set_value(SXTLITE_GPIO_NAND_NCE, 1); |
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167 | break; |
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168 | } |
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169 | ndelay(500); |
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170 | } |
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171 | |||
172 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) |
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173 | static struct nand_ecclayout rbsxtlite_nand_ecclayout = { |
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174 | .eccbytes = 6, |
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175 | .eccpos = { 8, 9, 10, 13, 14, 15 }, |
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176 | .oobavail = 9, |
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177 | .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } |
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178 | }; |
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179 | |||
180 | #else |
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181 | |||
182 | static int rbsxtlite_ooblayout_ecc(struct mtd_info *mtd, int section, |
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183 | struct mtd_oob_region *oobregion) |
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184 | { |
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185 | switch (section) { |
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186 | case 0: |
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187 | oobregion->offset = 8; |
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188 | oobregion->length = 3; |
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189 | return 0; |
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190 | case 1: |
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191 | oobregion->offset = 13; |
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192 | oobregion->length = 3; |
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193 | return 0; |
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194 | default: |
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195 | return -ERANGE; |
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196 | } |
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197 | } |
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198 | |||
199 | static int rbsxtlite_ooblayout_free(struct mtd_info *mtd, int section, |
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200 | struct mtd_oob_region *oobregion) |
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201 | { |
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202 | switch (section) { |
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203 | case 0: |
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204 | oobregion->offset = 0; |
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205 | oobregion->length = 4; |
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206 | return 0; |
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207 | case 1: |
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208 | oobregion->offset = 4; |
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209 | oobregion->length = 1; |
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210 | return 0; |
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211 | case 2: |
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212 | oobregion->offset = 6; |
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213 | oobregion->length = 2; |
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214 | return 0; |
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215 | case 3: |
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216 | oobregion->offset = 11; |
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217 | oobregion->length = 2; |
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218 | return 0; |
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219 | default: |
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220 | return -ERANGE; |
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221 | } |
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222 | } |
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223 | |||
224 | static const struct mtd_ooblayout_ops rbsxtlite_nand_ecclayout_ops = { |
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225 | .ecc = rbsxtlite_ooblayout_ecc, |
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226 | .free = rbsxtlite_ooblayout_free, |
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227 | }; |
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228 | #endif /* < 4.6 */ |
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229 | |||
230 | static int rbsxtlite_nand_scan_fixup(struct mtd_info *mtd) |
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231 | { |
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232 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) |
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233 | struct nand_chip *chip = mtd->priv; |
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234 | #endif |
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235 | |||
236 | if (mtd->writesize == 512) { |
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237 | /* |
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238 | * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot |
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239 | * will not be able to find the kernel that we load. |
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240 | */ |
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241 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) |
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242 | chip->ecc.layout = &rbsxtlite_nand_ecclayout; |
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243 | #else |
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244 | mtd_set_ooblayout(mtd, &rbsxtlite_nand_ecclayout_ops); |
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245 | #endif |
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246 | } |
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247 | |||
248 | return 0; |
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249 | } |
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250 | |||
251 | void __init rbsxtlite_gpio_init(void) |
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252 | { |
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253 | gpio_request_one(SXTLITE_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); |
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254 | } |
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255 | |||
256 | void __init rbsxtlite_nand_init(void) |
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257 | { |
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258 | ath79_nfc_set_scan_fixup(rbsxtlite_nand_scan_fixup); |
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259 | ath79_nfc_set_parts(rbsxtlite_nand_partitions, |
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260 | ARRAY_SIZE(rbsxtlite_nand_partitions)); |
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261 | ath79_nfc_set_select_chip(rbsxtlite_nand_select_chip); |
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262 | ath79_nfc_set_swap_dma(true); |
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263 | ath79_register_nfc(); |
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264 | } |
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265 | |||
266 | |||
267 | static void __init rbsxtlite_setup(void) |
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268 | { |
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269 | if(rbsxtlite_rbinfo_init()) |
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270 | return; |
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271 | rbsxtlite_nand_init(); |
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272 | rbsxtlite_wlan_init(); |
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273 | |||
274 | ath79_register_leds_gpio(-1, ARRAY_SIZE(rbsxtlite_leds_gpio), |
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275 | rbsxtlite_leds_gpio); |
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276 | ath79_register_gpio_keys_polled(-1, SXTLITE_KEYS_POLL_INTERVAL, |
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277 | ARRAY_SIZE(rbsxtlite_gpio_keys), |
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278 | rbsxtlite_gpio_keys); |
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279 | |||
280 | ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); |
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281 | |||
282 | ath79_register_mdio(1, 0x0); |
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283 | |||
284 | /* GMAC0 is left unused */ |
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285 | |||
286 | /* GMAC1 is connected to MAC0 on the internal switch */ |
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287 | /* The ethernet port connects to PHY P0, which connects to MAC1 |
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288 | on the internal switch */ |
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289 | ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); |
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290 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; |
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291 | ath79_register_eth(1); |
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292 | |||
293 | |||
294 | } |
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295 | |||
296 | |||
297 | MIPS_MACHINE(ATH79_MACH_RB_SXTLITE2ND, "sxt2n", "MikroTik RouterBOARD SXT Lite2", |
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298 | rbsxtlite_setup); |
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299 | |||
300 | MIPS_MACHINE(ATH79_MACH_RB_SXTLITE5ND, "sxt5n", "MikroTik RouterBOARD SXT Lite5", |
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301 | rbsxtlite_setup); |
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302 |