OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * WD My Net N750 board support |
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3 | * |
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4 | * Copyright (C) 2013 Felix Kaechele <felix@fetzig.org> |
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5 | * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> |
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6 | * |
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7 | * This program is free software; you can redistribute it and/or modify it |
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8 | * under the terms of the GNU General Public License version 2 as published |
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9 | * by the Free Software Foundation. |
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10 | */ |
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11 | |||
12 | #include <linux/pci.h> |
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13 | #include <linux/phy.h> |
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14 | #include <linux/gpio.h> |
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15 | #include <linux/delay.h> |
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16 | #include <linux/platform_device.h> |
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17 | #include <linux/ath9k_platform.h> |
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18 | #include <linux/ar8216_platform.h> |
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19 | |||
20 | #include <asm/mach-ath79/ar71xx_regs.h> |
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21 | |||
22 | #include "common.h" |
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23 | #include "dev-ap9x-pci.h" |
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24 | #include "dev-eth.h" |
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25 | #include "dev-gpio-buttons.h" |
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26 | #include "dev-leds-gpio.h" |
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27 | #include "dev-m25p80.h" |
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28 | #include "dev-spi.h" |
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29 | #include "dev-usb.h" |
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30 | #include "dev-wmac.h" |
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31 | #include "machtypes.h" |
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32 | #include "nvram.h" |
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33 | |||
34 | |||
35 | /* |
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36 | * Taken from GPL bootloader source: |
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37 | * board/ar7240/db12x/alpha_gpio.c |
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38 | */ |
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39 | #define MYNET_N750_GPIO_LED_WIFI 11 |
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40 | #define MYNET_N750_GPIO_LED_INTERNET 12 |
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41 | #define MYNET_N750_GPIO_LED_WPS 13 |
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42 | #define MYNET_N750_GPIO_LED_POWER 14 |
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43 | |||
44 | #define MYNET_N750_GPIO_BTN_RESET 17 |
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45 | #define MYNET_N750_GPIO_BTN_WPS 19 |
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46 | |||
47 | #define MYNET_N750_GPIO_EXTERNAL_LNA0 15 |
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48 | #define MYNET_N750_GPIO_EXTERNAL_LNA1 18 |
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49 | |||
50 | #define MYNET_N750_KEYS_POLL_INTERVAL 20 /* msecs */ |
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51 | #define MYNET_N750_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N750_KEYS_POLL_INTERVAL) |
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52 | |||
53 | #define MYNET_N750_WMAC_CALDATA_OFFSET 0x1000 |
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54 | #define MYNET_N750_PCIE_CALDATA_OFFSET 0x5000 |
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55 | |||
56 | #define MYNET_N750_NVRAM_ADDR 0x1f058010 |
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57 | #define MYNET_N750_NVRAM_SIZE 0x7ff0 |
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58 | |||
59 | static struct gpio_led mynet_n750_leds_gpio[] __initdata = { |
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60 | { |
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61 | .name = "wd:blue:power", |
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62 | .gpio = MYNET_N750_GPIO_LED_POWER, |
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63 | .active_low = 0, |
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64 | }, |
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65 | { |
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66 | .name = "wd:blue:wps", |
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67 | .gpio = MYNET_N750_GPIO_LED_WPS, |
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68 | .active_low = 0, |
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69 | }, |
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70 | { |
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71 | .name = "wd:blue:wireless", |
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72 | .gpio = MYNET_N750_GPIO_LED_WIFI, |
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73 | .active_low = 0, |
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74 | }, |
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75 | { |
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76 | .name = "wd:blue:internet", |
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77 | .gpio = MYNET_N750_GPIO_LED_INTERNET, |
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78 | .active_low = 0, |
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79 | }, |
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80 | }; |
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81 | |||
82 | static struct gpio_keys_button mynet_n750_gpio_keys[] __initdata = { |
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83 | { |
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84 | .desc = "Reset button", |
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85 | .type = EV_KEY, |
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86 | .code = KEY_RESTART, |
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87 | .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL, |
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88 | .gpio = MYNET_N750_GPIO_BTN_RESET, |
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89 | .active_low = 1, |
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90 | }, |
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91 | { |
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92 | .desc = "WPS button", |
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93 | .type = EV_KEY, |
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94 | .code = KEY_WPS_BUTTON, |
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95 | .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL, |
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96 | .gpio = MYNET_N750_GPIO_BTN_WPS, |
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97 | .active_low = 1, |
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98 | }, |
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99 | }; |
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100 | |||
101 | static const struct ar8327_led_info mynet_n750_leds_ar8327[] = { |
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102 | AR8327_LED_INFO(PHY0_0, HW, "wd:green:lan1"), |
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103 | AR8327_LED_INFO(PHY1_0, HW, "wd:green:lan2"), |
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104 | AR8327_LED_INFO(PHY2_0, HW, "wd:green:lan3"), |
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105 | AR8327_LED_INFO(PHY3_0, HW, "wd:green:lan4"), |
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106 | AR8327_LED_INFO(PHY4_0, HW, "wd:green:wan"), |
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107 | AR8327_LED_INFO(PHY0_1, HW, "wd:yellow:lan1"), |
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108 | AR8327_LED_INFO(PHY1_1, HW, "wd:yellow:lan2"), |
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109 | AR8327_LED_INFO(PHY2_1, HW, "wd:yellow:lan3"), |
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110 | AR8327_LED_INFO(PHY3_1, HW, "wd:yellow:lan4"), |
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111 | AR8327_LED_INFO(PHY4_1, HW, "wd:yellow:wan"), |
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112 | }; |
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113 | |||
114 | static struct ar8327_pad_cfg mynet_n750_ar8327_pad0_cfg = { |
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115 | .mode = AR8327_PAD_MAC_RGMII, |
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116 | .txclk_delay_en = true, |
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117 | .rxclk_delay_en = true, |
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118 | .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, |
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119 | .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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120 | }; |
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121 | |||
122 | static struct ar8327_led_cfg mynet_n750_ar8327_led_cfg = { |
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123 | .led_ctrl0 = 0xcc35cc35, |
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124 | .led_ctrl1 = 0xca35ca35, |
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125 | .led_ctrl2 = 0xc935c935, |
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126 | .led_ctrl3 = 0x03ffff00, |
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127 | .open_drain = false, |
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128 | }; |
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129 | |||
130 | static struct ar8327_platform_data mynet_n750_ar8327_data = { |
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131 | .pad0_cfg = &mynet_n750_ar8327_pad0_cfg, |
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132 | .port0_cfg = { |
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133 | .force_link = 1, |
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134 | .speed = AR8327_PORT_SPEED_1000, |
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135 | .duplex = 1, |
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136 | .txpause = 1, |
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137 | .rxpause = 1, |
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138 | }, |
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139 | .led_cfg = &mynet_n750_ar8327_led_cfg, |
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140 | .num_leds = ARRAY_SIZE(mynet_n750_leds_ar8327), |
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141 | .leds = mynet_n750_leds_ar8327, |
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142 | }; |
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143 | |||
144 | static struct mdio_board_info mynet_n750_mdio0_info[] = { |
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145 | { |
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146 | .bus_id = "ag71xx-mdio.0", |
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3 | office | 147 | .phy_addr = 0, |
1 | office | 148 | .platform_data = &mynet_n750_ar8327_data, |
149 | }, |
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150 | }; |
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151 | |||
152 | static void mynet_n750_get_mac(const char *name, char *mac) |
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153 | { |
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154 | u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N750_NVRAM_ADDR); |
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155 | int err; |
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156 | |||
157 | err = ath79_nvram_parse_mac_addr(nvram, MYNET_N750_NVRAM_SIZE, |
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158 | name, mac); |
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159 | if (err) |
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160 | pr_err("no MAC address found for %s\n", name); |
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161 | } |
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162 | |||
163 | /* |
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164 | * The bootloader on this board powers down all PHYs on the switch |
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165 | * before booting the kernel. We bring all PHYs back up so that they are |
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166 | * discoverable by the mdio bus scan and the switch is detected |
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167 | * correctly. |
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168 | */ |
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169 | static void mynet_n750_mdio_fixup(struct mii_bus *bus) |
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170 | { |
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171 | int i; |
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172 | |||
173 | for (i = 0; i < 5; i++) |
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174 | bus->write(bus, i, MII_BMCR, |
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175 | (BMCR_RESET | BMCR_ANENABLE | BMCR_SPEED1000)); |
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176 | |||
177 | mdelay(1000); |
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178 | } |
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179 | |||
180 | static void __init mynet_n750_setup(void) |
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181 | { |
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182 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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183 | u8 tmpmac[ETH_ALEN]; |
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184 | |||
185 | ath79_register_m25p80(NULL); |
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186 | ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n750_leds_gpio), |
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187 | mynet_n750_leds_gpio); |
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188 | ath79_register_gpio_keys_polled(-1, MYNET_N750_KEYS_POLL_INTERVAL, |
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189 | ARRAY_SIZE(mynet_n750_gpio_keys), |
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190 | mynet_n750_gpio_keys); |
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191 | /* |
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192 | * Control signal for external LNAs 0 and 1 |
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193 | * Taken from GPL bootloader source: |
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194 | * board/ar7240/db12x/alpha_gpio.c |
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195 | */ |
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196 | ath79_wmac_set_ext_lna_gpio(0, MYNET_N750_GPIO_EXTERNAL_LNA0); |
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197 | ath79_wmac_set_ext_lna_gpio(1, MYNET_N750_GPIO_EXTERNAL_LNA1); |
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198 | |||
199 | mynet_n750_get_mac("wlan24mac=", tmpmac); |
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200 | ath79_register_wmac(art + MYNET_N750_WMAC_CALDATA_OFFSET, tmpmac); |
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201 | |||
202 | mynet_n750_get_mac("wlan5mac=", tmpmac); |
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203 | ap91_pci_init(art + MYNET_N750_PCIE_CALDATA_OFFSET, tmpmac); |
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204 | |||
205 | ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); |
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206 | |||
207 | mdiobus_register_board_info(mynet_n750_mdio0_info, |
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208 | ARRAY_SIZE(mynet_n750_mdio0_info)); |
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209 | |||
210 | ath79_mdio0_data.reset = mynet_n750_mdio_fixup; |
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211 | ath79_register_mdio(0, 0x0); |
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212 | |||
213 | mynet_n750_get_mac("lanmac=", ath79_eth0_data.mac_addr); |
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214 | |||
215 | /* GMAC0 is connected to an AR8327N switch */ |
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216 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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217 | ath79_eth0_data.phy_mask = BIT(0); |
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218 | ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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219 | ath79_eth0_pll_data.pll_1000 = 0x06000000; |
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220 | ath79_register_eth(0); |
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221 | |||
222 | ath79_register_usb(); |
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223 | } |
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224 | |||
225 | MIPS_MACHINE(ATH79_MACH_MYNET_N750, "MYNET-N750", "WD My Net N750", |
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226 | mynet_n750_setup); |