OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * EnGenius EPG5000 board support |
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3 | * |
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4 | * Copyright (c) 2014 Jon Suphammer <jon@suphammer.net> |
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5 | * Copyright (c) 2015 Christian Beier <cb@shoutrlabs.com> |
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6 | * |
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7 | * This program is free software; you can redistribute it and/or modify it |
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8 | * under the terms of the GNU General Public License version 2 as published |
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9 | * by the Free Software Foundation. |
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10 | */ |
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11 | |||
12 | #include <linux/platform_device.h> |
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13 | #include <linux/ar8216_platform.h> |
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14 | |||
15 | #include <asm/mach-ath79/ar71xx_regs.h> |
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16 | |||
17 | #include "common.h" |
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18 | #include "pci.h" |
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19 | #include "dev-ap9x-pci.h" |
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20 | #include "dev-gpio-buttons.h" |
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21 | #include "dev-eth.h" |
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22 | #include "dev-leds-gpio.h" |
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23 | #include "dev-m25p80.h" |
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24 | #include "dev-usb.h" |
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25 | #include "dev-wmac.h" |
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26 | #include "machtypes.h" |
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27 | #include "nvram.h" |
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28 | |||
29 | #define EPG5000_GPIO_LED_WLAN_5G 23 |
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30 | #define EPG5000_GPIO_LED_WLAN_2G 13 |
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31 | #define EPG5000_GPIO_LED_POWER_AMBER 2 |
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32 | #define EPG5000_GPIO_LED_WPS_AMBER 22 |
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33 | #define EPG5000_GPIO_LED_WPS_BLUE 19 |
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34 | |||
35 | #define EPG5000_GPIO_BTN_WPS 16 |
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36 | #define EPG5000_GPIO_BTN_RESET 17 |
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37 | |||
38 | #define EPG5000_KEYS_POLL_INTERVAL 20 /* msecs */ |
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39 | #define EPG5000_KEYS_DEBOUNCE_INTERVAL (3 * EPG5000_KEYS_POLL_INTERVAL) |
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40 | |||
41 | #define EPG5000_CALDATA_ADDR 0x1fff0000 |
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42 | #define EPG5000_WMAC_CALDATA_OFFSET 0x1000 |
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43 | #define EPG5000_PCIE_CALDATA_OFFSET 0x5000 |
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44 | |||
45 | #define EPG5000_NVRAM_ADDR 0x1f030000 |
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46 | #define EPG5000_NVRAM_SIZE 0x10000 |
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47 | |||
48 | static struct gpio_led epg5000_leds_gpio[] __initdata = { |
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49 | { |
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50 | .name = "epg5000:amber:power", |
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51 | .gpio = EPG5000_GPIO_LED_POWER_AMBER, |
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52 | .active_low = 1, |
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53 | }, |
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54 | { |
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55 | .name = "epg5000:blue:wps", |
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56 | .gpio = EPG5000_GPIO_LED_WPS_BLUE, |
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57 | .active_low = 1, |
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58 | }, |
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59 | { |
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60 | .name = "epg5000:amber:wps", |
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61 | .gpio = EPG5000_GPIO_LED_WPS_AMBER, |
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62 | .active_low = 1, |
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63 | }, |
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64 | { |
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65 | .name = "epg5000:blue:wlan-2g", |
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66 | .gpio = EPG5000_GPIO_LED_WLAN_2G, |
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67 | .active_low = 1, |
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68 | }, |
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69 | { |
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70 | .name = "epg5000:blue:wlan-5g", |
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71 | .gpio = EPG5000_GPIO_LED_WLAN_5G, |
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72 | .active_low = 1, |
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73 | } |
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74 | }; |
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75 | |||
76 | static struct gpio_keys_button epg5000_gpio_keys[] __initdata = { |
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77 | { |
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78 | .desc = "WPS button", |
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79 | .type = EV_KEY, |
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80 | .code = KEY_WPS_BUTTON, |
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81 | .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL, |
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82 | .gpio = EPG5000_GPIO_BTN_WPS, |
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83 | .active_low = 1, |
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84 | }, |
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85 | { |
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86 | .desc = "Reset button", |
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87 | .type = EV_KEY, |
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88 | .code = KEY_RESTART, |
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89 | .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL, |
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90 | .gpio = EPG5000_GPIO_BTN_RESET, |
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91 | .active_low = 1, |
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92 | }, |
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93 | }; |
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94 | |||
95 | static struct ar8327_pad_cfg epg5000_ar8327_pad0_cfg = { |
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96 | .mode = AR8327_PAD_MAC_RGMII, |
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97 | .txclk_delay_en = true, |
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98 | .rxclk_delay_en = true, |
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99 | .txclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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100 | .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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101 | }; |
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102 | |||
103 | static struct ar8327_platform_data epg5000_ar8327_data = { |
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104 | .pad0_cfg = &epg5000_ar8327_pad0_cfg, |
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105 | .port0_cfg = { |
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106 | .force_link = 1, |
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107 | .speed = AR8327_PORT_SPEED_1000, |
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108 | .duplex = 1, |
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109 | .txpause = 1, |
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110 | .rxpause = 1, |
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111 | }, |
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112 | }; |
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113 | |||
114 | static struct mdio_board_info epg5000_mdio0_info[] = { |
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115 | { |
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116 | .bus_id = "ag71xx-mdio.0", |
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3 | office | 117 | .phy_addr = 0, |
1 | office | 118 | .platform_data = &epg5000_ar8327_data, |
119 | }, |
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120 | }; |
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121 | |||
122 | static int epg5000_get_mac(const char *name, char *mac) |
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123 | { |
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124 | u8 *nvram = (u8 *) KSEG1ADDR(EPG5000_NVRAM_ADDR); |
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125 | int err; |
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126 | |||
127 | err = ath79_nvram_parse_mac_addr(nvram, EPG5000_NVRAM_SIZE, |
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128 | name, mac); |
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129 | if (err) { |
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130 | pr_err("no MAC address found for %s\n", name); |
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131 | return false; |
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132 | } |
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133 | |||
134 | return true; |
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135 | } |
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136 | |||
137 | static void __init epg5000_setup(void) |
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138 | { |
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139 | u8 *caldata = (u8 *) KSEG1ADDR(EPG5000_CALDATA_ADDR); |
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140 | u8 mac1[ETH_ALEN]; |
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141 | |||
142 | ath79_register_m25p80(NULL); |
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143 | |||
144 | ath79_register_leds_gpio(-1, ARRAY_SIZE(epg5000_leds_gpio), |
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145 | epg5000_leds_gpio); |
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146 | ath79_register_gpio_keys_polled(-1, EPG5000_KEYS_POLL_INTERVAL, |
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147 | ARRAY_SIZE(epg5000_gpio_keys), |
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148 | epg5000_gpio_keys); |
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149 | |||
150 | ath79_register_usb(); |
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151 | |||
152 | ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); |
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153 | |||
154 | ath79_register_mdio(0, 0x0); |
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155 | |||
156 | mdiobus_register_board_info(epg5000_mdio0_info, |
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157 | ARRAY_SIZE(epg5000_mdio0_info)); |
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158 | |||
159 | /* GMAC0 is connected to an QCA8327N switch */ |
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160 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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161 | ath79_eth0_data.phy_mask = BIT(0); |
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162 | ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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163 | |||
164 | if (epg5000_get_mac("ethaddr=", mac1)) |
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165 | ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); |
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166 | |||
167 | ath79_eth0_pll_data.pll_1000 = 0xa6000000; |
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168 | ath79_register_eth(0); |
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169 | |||
170 | ath79_register_wmac(caldata + EPG5000_WMAC_CALDATA_OFFSET, mac1); |
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171 | |||
172 | ath79_register_pci(); |
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173 | } |
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174 | |||
175 | MIPS_MACHINE(ATH79_MACH_EPG5000, "EPG5000", |
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176 | "EnGenius EPG5000", |
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177 | epg5000_setup); |