OpenWrt – Blame information for rev 2
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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1 | office | 1 | /* |
| 2 | * EnGenius ENS202EXT board support |
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| 3 | * |
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| 4 | * Copyright (C) 2017 Marty Plummer <netz.kernel@gmail.com> |
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| 5 | * |
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| 6 | * This program is free software; you can redistribute it and/or modify it |
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| 7 | * under the terms of the GNU General Public License version 2 as published |
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| 8 | * by the Free Software Foundation. |
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| 9 | */ |
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| 10 | |||
| 11 | #include <linux/gpio.h> |
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| 12 | #include <linux/mtd/mtd.h> |
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| 13 | #include <linux/mtd/partitions.h> |
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| 14 | #include <linux/platform_device.h> |
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| 15 | |||
| 16 | #include <asm/mach-ath79/ar71xx_regs.h> |
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| 17 | #include <asm/mach-ath79/ath79.h> |
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| 18 | |||
| 19 | #include "common.h" |
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| 20 | #include "dev-eth.h" |
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| 21 | #include "dev-gpio-buttons.h" |
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| 22 | #include "dev-leds-gpio.h" |
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| 23 | #include "dev-m25p80.h" |
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| 24 | #include "dev-wmac.h" |
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| 25 | #include "machtypes.h" |
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| 26 | #include "nvram.h" |
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| 27 | |||
| 28 | #define ENS202_GPIO_LED_WLAN4 0 |
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| 29 | #define ENS202_GPIO_LED_POWER 14 |
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| 30 | #define ENS202_GPIO_LED_WLAN2 16 |
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| 31 | #define ENS202_GPIO_LED_WLAN3 17 |
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| 32 | #define ENS202_GPIO_LED_WLAN1 18 |
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| 33 | |||
| 34 | #define ENS202_GPIO_BTN_RESET 1 |
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| 35 | |||
| 36 | #define ENS202_KEYS_POLL_INTERVAL 20 /* msecs */ |
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| 37 | #define ENS202_KEYS_DEBOUNCE_INTERVAL (3 * ENS202_KEYS_POLL_INTERVAL) |
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| 38 | |||
| 39 | static struct gpio_led ens202_leds_gpio[] __initdata = { |
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| 40 | { |
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| 41 | .name = "engenius:amber:wlan1", |
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| 42 | .gpio = ENS202_GPIO_LED_WLAN1, |
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| 43 | .active_low = 1, |
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| 44 | }, { |
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| 45 | .name = "engenius:red:wlan2", |
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| 46 | .gpio = ENS202_GPIO_LED_WLAN2, |
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| 47 | .active_low = 1, |
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| 48 | }, { |
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| 49 | .name = "engenius:amber:wlan3", |
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| 50 | .gpio = ENS202_GPIO_LED_WLAN3, |
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| 51 | .active_low = 1, |
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| 52 | }, { |
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| 53 | .name = "engenius:green:wlan4", |
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| 54 | .gpio = ENS202_GPIO_LED_WLAN4, |
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| 55 | .active_low = 1, |
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| 56 | }, { |
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| 57 | .name = "engenius:amber:power", |
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| 58 | .gpio = ENS202_GPIO_LED_POWER, |
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| 59 | .active_low = 1, |
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| 60 | } |
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| 61 | }; |
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| 62 | |||
| 63 | static struct gpio_keys_button ens202_gpio_keys[] __initdata = { |
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| 64 | { |
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| 65 | .desc = "reset", |
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| 66 | .type = EV_KEY, |
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| 67 | .code = KEY_RESTART, |
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| 68 | .debounce_interval = ENS202_KEYS_DEBOUNCE_INTERVAL, |
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| 69 | .gpio = ENS202_GPIO_BTN_RESET, |
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| 70 | .active_low = 1, |
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| 71 | } |
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| 72 | }; |
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| 73 | |||
| 74 | static void __init ens202_setup(void) |
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| 75 | { |
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| 76 | const char *nvram = (char *) KSEG1ADDR(0x1f040000); |
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| 77 | u8 mac_buff[6]; |
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| 78 | u8 *mac = NULL; |
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| 79 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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| 80 | |||
| 81 | if (ath79_nvram_parse_mac_addr(nvram, 0x10000, |
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| 82 | "ethaddr=", mac_buff) == 0) { |
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| 83 | ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0); |
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| 84 | ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1); |
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| 85 | mac = mac_buff; |
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| 86 | } |
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| 87 | |||
| 88 | ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); |
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| 89 | |||
| 90 | ath79_gpio_output_select(ENS202_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO); |
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| 91 | ath79_gpio_output_select(ENS202_GPIO_LED_WLAN1, AR934X_GPIO_OUT_GPIO); |
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| 92 | ath79_gpio_output_select(ENS202_GPIO_LED_WLAN2, AR934X_GPIO_OUT_GPIO); |
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| 93 | ath79_gpio_output_select(ENS202_GPIO_LED_WLAN3, AR934X_GPIO_OUT_GPIO); |
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| 94 | ath79_gpio_output_select(ENS202_GPIO_LED_WLAN4, AR934X_GPIO_OUT_GPIO); |
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| 95 | |||
| 96 | ath79_register_leds_gpio(-1, ARRAY_SIZE(ens202_leds_gpio), |
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| 97 | ens202_leds_gpio); |
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| 98 | ath79_register_gpio_keys_polled(-1, ENS202_KEYS_POLL_INTERVAL, |
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| 99 | ARRAY_SIZE(ens202_gpio_keys), |
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| 100 | ens202_gpio_keys); |
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| 101 | |||
| 102 | ath79_register_m25p80(NULL); |
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| 103 | |||
| 104 | ath79_register_wmac(art + 0x1000, NULL); |
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| 105 | |||
| 106 | ath79_register_mdio(1, 0); |
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| 107 | |||
| 108 | ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | |
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| 109 | AR934X_ETH_CFG_SW_ONLY_MODE); |
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| 110 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
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| 111 | ath79_eth0_data.phy_mask = BIT(0); |
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| 112 | ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; |
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| 113 | ath79_eth0_pll_data.pll_1000 = 0x06000000; |
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| 114 | |||
| 115 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; |
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| 116 | ath79_eth1_data.speed = SPEED_1000; |
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| 117 | ath79_eth1_data.duplex = DUPLEX_FULL; |
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| 118 | |||
| 119 | ath79_register_eth(0); |
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| 120 | ath79_register_eth(1); |
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| 121 | } |
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| 122 | |||
| 123 | MIPS_MACHINE(ATH79_MACH_ENS202EXT, "ENS202EXT", "EnGenius ENS202EXT", |
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| 124 | ens202_setup); |