OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * Qxwlan E750G v8 board support |
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3 | * |
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4 | * Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com> |
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5 | * |
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6 | * This program is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU General Public License version 2 as published |
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8 | * by the Free Software Foundation. |
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9 | */ |
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10 | |||
11 | #include <linux/phy.h> |
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12 | #include <linux/platform_device.h> |
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13 | #include <linux/ath9k_platform.h> |
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14 | #include <linux/ar8216_platform.h> |
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15 | |||
16 | #include <asm/mach-ath79/ar71xx_regs.h> |
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17 | |||
18 | #include "common.h" |
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19 | #include "pci.h" |
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20 | #include "dev-ap9x-pci.h" |
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21 | #include "dev-gpio-buttons.h" |
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22 | #include "dev-eth.h" |
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23 | #include "dev-usb.h" |
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24 | #include "dev-leds-gpio.h" |
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25 | #include "dev-m25p80.h" |
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26 | #include "dev-spi.h" |
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27 | #include "dev-wmac.h" |
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28 | #include "machtypes.h" |
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29 | |||
30 | #define E750G_V8_GPIO_LED_SYS 14 |
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31 | #define E750G_V8_GPIO_LED_DS20 15 |
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32 | #define E750G_V8_GPIO_LED_DS10 20 |
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33 | #define E750G_V8_GPIO_LED_WLAN 21 |
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34 | |||
35 | #define E750G_V8_GPIO_BTN_RESET 12 |
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36 | |||
37 | #define E750G_V8_KEYS_POLL_INTERVAL 20 /* msecs */ |
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38 | #define E750G_V8_KEYS_DEBOUNCE_INTERVAL (3 * E750G_V8_KEYS_POLL_INTERVAL) |
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39 | |||
40 | static struct gpio_led e750g_v8_leds_gpio[] __initdata = { |
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41 | { |
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42 | .name = "e750g-v8:green:system", |
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43 | .gpio = E750G_V8_GPIO_LED_SYS, |
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44 | .active_low = 1, |
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45 | }, |
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46 | { |
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47 | .name = "e750g-v8:green:ds10", |
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48 | .gpio = E750G_V8_GPIO_LED_DS10, |
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49 | .active_low = 1, |
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50 | }, |
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51 | { |
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52 | .name = "e750g-v8:green:ds20", |
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53 | .gpio = E750G_V8_GPIO_LED_DS20, |
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54 | .active_low = 1, |
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55 | }, |
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56 | { |
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57 | .name = "e750g-v8:green:wlan", |
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58 | .gpio = E750G_V8_GPIO_LED_WLAN, |
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59 | .active_low = 1, |
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60 | }, |
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61 | }; |
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62 | |||
63 | static struct gpio_keys_button e750g_v8_gpio_keys[] __initdata = { |
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64 | { |
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65 | .desc = "reset", |
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66 | .type = EV_KEY, |
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67 | .code = KEY_RESTART, |
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68 | .debounce_interval = E750G_V8_KEYS_DEBOUNCE_INTERVAL, |
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69 | .gpio = E750G_V8_GPIO_BTN_RESET, |
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70 | .active_low = 1, |
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71 | }, |
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72 | }; |
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73 | |||
74 | static const struct ar8327_led_info e750g_v8_leds_qca8334[] = { |
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75 | AR8327_LED_INFO(PHY1_0, HW, "e750g-v8:green:lan"), |
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76 | AR8327_LED_INFO(PHY2_0, HW, "e750g-v8:green:wan"), |
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77 | }; |
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78 | |||
79 | static struct ar8327_pad_cfg e750g_v8_ar8327_pad0_cfg = { |
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80 | .mode = AR8327_PAD_MAC_RGMII, |
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81 | .txclk_delay_en = true, |
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82 | .rxclk_delay_en = true, |
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83 | .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, |
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84 | .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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85 | .mac06_exchange_dis = true, |
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86 | }; |
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87 | |||
88 | static struct ar8327_led_cfg e750g_v8_ar8327_led_cfg = { |
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89 | .led_ctrl0 = 0x00000000, |
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90 | .led_ctrl1 = 0xc737c737, |
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91 | .led_ctrl2 = 0x00000000, |
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92 | .led_ctrl3 = 0x00c30c00, |
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93 | .open_drain = true, |
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94 | }; |
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95 | |||
96 | static struct ar8327_platform_data e750g_v8_ar8327_data = { |
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97 | .pad0_cfg = &e750g_v8_ar8327_pad0_cfg, |
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98 | .port0_cfg = { |
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99 | .force_link = 1, |
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100 | .speed = AR8327_PORT_SPEED_1000, |
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101 | .duplex = 1, |
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102 | .txpause = 1, |
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103 | .rxpause = 1, |
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104 | }, |
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105 | .led_cfg = &e750g_v8_ar8327_led_cfg, |
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106 | .leds = e750g_v8_leds_qca8334, |
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107 | .num_leds = ARRAY_SIZE(e750g_v8_leds_qca8334), |
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108 | }; |
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109 | |||
110 | static struct mdio_board_info e750g_v8_mdio0_info[] = { |
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111 | { |
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112 | .bus_id = "ag71xx-mdio.0", |
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113 | .mdio_addr = 0, |
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114 | .platform_data = &e750g_v8_ar8327_data, |
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115 | }, |
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116 | }; |
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117 | |||
118 | static void __init e750g_v8_setup(void) |
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119 | { |
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120 | u8 *mac = (u8 *) KSEG1ADDR(0x1f050400); |
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121 | u8 *art = (u8 *) KSEG1ADDR(0x1f061000); |
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122 | |||
123 | ath79_register_m25p80(NULL); |
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124 | ath79_register_leds_gpio(-1, ARRAY_SIZE(e750g_v8_leds_gpio), |
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125 | e750g_v8_leds_gpio); |
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126 | ath79_register_gpio_keys_polled(-1, E750G_V8_KEYS_POLL_INTERVAL, |
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127 | ARRAY_SIZE(e750g_v8_gpio_keys), |
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128 | e750g_v8_gpio_keys); |
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129 | |||
130 | mdiobus_register_board_info(e750g_v8_mdio0_info, |
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131 | ARRAY_SIZE(e750g_v8_mdio0_info)); |
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132 | |||
133 | ath79_register_mdio(0, 0x0); |
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134 | ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | |
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135 | AR934X_ETH_CFG_SW_ONLY_MODE); |
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136 | |||
137 | /* GMAC0 is connected to an AR8327 switch */ |
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138 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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139 | ath79_eth0_data.phy_mask = BIT(0); |
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140 | ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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141 | ath79_eth0_pll_data.pll_1000 = 0x06000000; |
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142 | ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); |
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143 | ath79_register_eth(0); |
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144 | |||
145 | ath79_register_pci(); |
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146 | ath79_register_usb(); |
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147 | ath79_register_wmac(art, NULL); |
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148 | } |
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149 | |||
150 | MIPS_MACHINE(ATH79_MACH_E750G_V8, "E750G-V8", "Qxwlan E750G v8", |
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151 | e750g_v8_setup); |