OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * D-Link DIR-825 rev. C1 board support |
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3 | * |
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4 | * Copyright (C) 2013 Alexander Stadler |
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5 | * |
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6 | * This program is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU General Public License version 2 as published |
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8 | * by the Free Software Foundation. |
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9 | */ |
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10 | |||
11 | #include <linux/pci.h> |
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12 | #include <linux/phy.h> |
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13 | #include <linux/gpio.h> |
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14 | #include <linux/platform_device.h> |
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15 | #include <linux/ath9k_platform.h> |
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16 | #include <linux/ar8216_platform.h> |
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17 | |||
18 | #include <asm/mach-ath79/ar71xx_regs.h> |
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19 | |||
20 | #include "common.h" |
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21 | #include "dev-ap9x-pci.h" |
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22 | #include "dev-eth.h" |
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23 | #include "dev-gpio-buttons.h" |
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24 | #include "dev-leds-gpio.h" |
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25 | #include "dev-m25p80.h" |
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26 | #include "dev-spi.h" |
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27 | #include "dev-usb.h" |
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28 | #include "dev-wmac.h" |
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29 | #include "machtypes.h" |
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30 | |||
31 | #define DIR825C1_GPIO_LED_BLUE_USB 11 |
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32 | #define DIR825C1_GPIO_LED_AMBER_POWER 14 |
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33 | #define DIR825C1_GPIO_LED_BLUE_POWER 22 |
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34 | #define DIR825C1_GPIO_LED_BLUE_WPS 15 |
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35 | #define DIR825C1_GPIO_LED_AMBER_PLANET 19 |
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36 | #define DIR825C1_GPIO_LED_BLUE_PLANET 18 |
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37 | #define DIR825C1_GPIO_LED_WLAN_2G 13 |
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38 | |||
39 | #define DIR825C1_GPIO_WAN_LED_ENABLE 20 |
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40 | |||
41 | #define DIR825C1_GPIO_BTN_RESET 17 |
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42 | #define DIR825C1_GPIO_BTN_WPS 16 |
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43 | |||
44 | #define DIR825C1_KEYS_POLL_INTERVAL 20 /* msecs */ |
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45 | #define DIR825C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825C1_KEYS_POLL_INTERVAL) |
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46 | |||
47 | #define DIR825C1_MAC0_OFFSET 0x4 |
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48 | #define DIR825C1_MAC1_OFFSET 0x18 |
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49 | #define DIR825C1_WMAC_CALDATA_OFFSET 0x1000 |
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50 | #define DIR825C1_PCIE_CALDATA_OFFSET 0x5000 |
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51 | |||
52 | static struct gpio_led dir825c1_leds_gpio[] __initdata = { |
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53 | { |
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54 | .name = "d-link:blue:usb", |
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55 | .gpio = DIR825C1_GPIO_LED_BLUE_USB, |
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56 | .active_low = 1, |
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57 | }, |
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58 | { |
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59 | .name = "d-link:amber:power", |
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60 | .gpio = DIR825C1_GPIO_LED_AMBER_POWER, |
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61 | .active_low = 1, |
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62 | }, |
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63 | { |
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64 | .name = "d-link:blue:power", |
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65 | .gpio = DIR825C1_GPIO_LED_BLUE_POWER, |
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66 | .active_low = 1, |
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67 | }, |
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68 | { |
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69 | .name = "d-link:blue:wps", |
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70 | .gpio = DIR825C1_GPIO_LED_BLUE_WPS, |
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71 | .active_low = 1, |
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72 | }, |
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73 | { |
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74 | .name = "d-link:amber:planet", |
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75 | .gpio = DIR825C1_GPIO_LED_AMBER_PLANET, |
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76 | .active_low = 1, |
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77 | }, |
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78 | { |
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79 | .name = "d-link:blue:wlan2g", |
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80 | .gpio = DIR825C1_GPIO_LED_WLAN_2G, |
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81 | .active_low = 1, |
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82 | }, |
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83 | }; |
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84 | |||
85 | static struct gpio_led dir835a1_leds_gpio[] __initdata = { |
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86 | { |
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87 | .name = "d-link:amber:power", |
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88 | .gpio = DIR825C1_GPIO_LED_AMBER_POWER, |
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89 | .active_low = 1, |
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90 | }, |
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91 | { |
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92 | .name = "d-link:green:power", |
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93 | .gpio = DIR825C1_GPIO_LED_BLUE_POWER, |
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94 | .active_low = 1, |
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95 | }, |
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96 | { |
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97 | .name = "d-link:blue:wps", |
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98 | .gpio = DIR825C1_GPIO_LED_BLUE_WPS, |
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99 | .active_low = 1, |
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100 | }, |
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101 | { |
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102 | .name = "d-link:amber:planet", |
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103 | .gpio = DIR825C1_GPIO_LED_AMBER_PLANET, |
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104 | .active_low = 1, |
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105 | }, |
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106 | { |
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107 | .name = "d-link:green:planet", |
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108 | .gpio = DIR825C1_GPIO_LED_BLUE_PLANET, |
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109 | .active_low = 1, |
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110 | }, |
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111 | }; |
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112 | |||
113 | static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = { |
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114 | { |
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115 | .desc = "Soft reset", |
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116 | .type = EV_KEY, |
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117 | .code = KEY_RESTART, |
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118 | .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL, |
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119 | .gpio = DIR825C1_GPIO_BTN_RESET, |
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120 | .active_low = 1, |
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121 | }, |
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122 | { |
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123 | .desc = "WPS button", |
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124 | .type = EV_KEY, |
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125 | .code = KEY_WPS_BUTTON, |
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126 | .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL, |
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127 | .gpio = DIR825C1_GPIO_BTN_WPS, |
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128 | .active_low = 1, |
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129 | }, |
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130 | }; |
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131 | |||
132 | static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = { |
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133 | .mode = AR8327_PAD_MAC_RGMII, |
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134 | .txclk_delay_en = true, |
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135 | .rxclk_delay_en = true, |
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136 | .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, |
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137 | .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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138 | }; |
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139 | |||
140 | static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = { |
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141 | .led_ctrl0 = 0x00000000, |
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142 | .led_ctrl1 = 0xc737c737, |
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143 | .led_ctrl2 = 0x00000000, |
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144 | .led_ctrl3 = 0x00c30c00, |
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145 | .open_drain = true, |
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146 | }; |
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147 | |||
148 | static struct ar8327_platform_data dir825c1_ar8327_data = { |
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149 | .pad0_cfg = &dir825c1_ar8327_pad0_cfg, |
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150 | .port0_cfg = { |
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151 | .force_link = 1, |
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152 | .speed = AR8327_PORT_SPEED_1000, |
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153 | .duplex = 1, |
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154 | .txpause = 1, |
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155 | .rxpause = 1, |
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156 | }, |
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157 | .led_cfg = &dir825c1_ar8327_led_cfg, |
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158 | }; |
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159 | |||
160 | static struct mdio_board_info dir825c1_mdio0_info[] = { |
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161 | { |
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162 | .bus_id = "ag71xx-mdio.0", |
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3 | office | 163 | .phy_addr = 0, |
1 | office | 164 | .platform_data = &dir825c1_ar8327_data, |
165 | }, |
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166 | }; |
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167 | |||
168 | static void __init dir825c1_generic_setup(void) |
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169 | { |
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170 | u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); |
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171 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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172 | u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; |
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173 | u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN]; |
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174 | |||
175 | ath79_parse_ascii_mac(mac + DIR825C1_MAC0_OFFSET, mac0); |
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176 | ath79_parse_ascii_mac(mac + DIR825C1_MAC1_OFFSET, mac1); |
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177 | |||
178 | ath79_register_m25p80(NULL); |
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179 | |||
180 | ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL, |
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181 | ARRAY_SIZE(dir825c1_gpio_keys), |
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182 | dir825c1_gpio_keys); |
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183 | |||
184 | ath79_init_mac(wmac0, mac0, 0); |
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185 | ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, wmac0); |
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186 | |||
187 | ath79_init_mac(wmac1, mac1, 1); |
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188 | ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, wmac1); |
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189 | |||
190 | ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); |
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191 | |||
192 | mdiobus_register_board_info(dir825c1_mdio0_info, |
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193 | ARRAY_SIZE(dir825c1_mdio0_info)); |
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194 | |||
195 | ath79_register_mdio(0, 0x0); |
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196 | |||
197 | ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); |
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198 | |||
199 | /* GMAC0 is connected to an AR8327N switch */ |
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200 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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201 | ath79_eth0_data.phy_mask = BIT(0); |
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202 | ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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203 | ath79_eth0_pll_data.pll_1000 = 0x06000000; |
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204 | ath79_register_eth(0); |
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205 | |||
206 | ath79_register_usb(); |
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207 | } |
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208 | |||
209 | static void __init dir825c1_setup(void) |
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210 | { |
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211 | ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB, |
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212 | AR934X_GPIO_OUT_GPIO); |
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213 | |||
214 | gpio_request_one(DIR825C1_GPIO_WAN_LED_ENABLE, |
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215 | GPIOF_OUT_INIT_LOW, "WAN LED enable"); |
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216 | |||
217 | ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio), |
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218 | dir825c1_leds_gpio); |
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219 | |||
220 | ap9x_pci_setup_wmac_led_pin(0, 0); |
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221 | |||
222 | dir825c1_generic_setup(); |
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223 | } |
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224 | |||
225 | static void __init dir835a1_setup(void) |
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226 | { |
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227 | dir825c1_ar8327_data.led_cfg = NULL; |
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228 | |||
229 | ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio), |
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230 | dir835a1_leds_gpio); |
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231 | |||
232 | dir825c1_generic_setup(); |
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233 | } |
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234 | |||
235 | MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1", |
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236 | "D-Link DIR-825 rev. C1", |
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237 | dir825c1_setup); |
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238 | |||
239 | MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1", |
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240 | "D-Link DIR-835 rev. A1", |
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241 | dir835a1_setup); |