OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * Buffalo BHR-4GRV2 board support |
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3 | * |
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4 | * Copyright (c) 2012 Qualcomm Atheros |
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5 | * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org> |
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6 | * Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com> |
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7 | * |
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8 | * Based on mach-ap136.c and mach-wzr-450hp2.c |
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9 | * |
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10 | * Permission to use, copy, modify, and/or distribute this software for any |
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11 | * purpose with or without fee is hereby granted, provided that the above |
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12 | * copyright notice and this permission notice appear in all copies. |
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13 | * |
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14 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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15 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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16 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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17 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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18 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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19 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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20 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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21 | * |
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22 | */ |
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23 | |||
24 | #include <linux/platform_device.h> |
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25 | #include <linux/ar8216_platform.h> |
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26 | |||
27 | #include <asm/mach-ath79/ar71xx_regs.h> |
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28 | |||
29 | #include "common.h" |
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30 | #include "dev-eth.h" |
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31 | #include "dev-gpio-buttons.h" |
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32 | #include "dev-leds-gpio.h" |
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33 | #include "dev-m25p80.h" |
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34 | #include "machtypes.h" |
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35 | |||
36 | #define BHR_4GRV2_GPIO_LED_VPN_RED 3 |
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37 | #define BHR_4GRV2_GPIO_LED_VPN_GREEN 18 |
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38 | #define BHR_4GRV2_GPIO_LED_POWER_GREEN 19 |
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39 | #define BHR_4GRV2_GPIO_LED_DIAG_RED 20 |
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40 | |||
41 | #define BHR_4GRV2_GPIO_BTN_RESET 17 |
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42 | #define BHR_4GRV2_GPIO_BTN_ECO 21 |
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43 | |||
44 | #define BHR_4GRV2_KEYS_POLL_INTERVAL 20 /* msecs */ |
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45 | #define BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL (3 * BHR_4GRV2_KEYS_POLL_INTERVAL) |
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46 | #define BHR_4GRV2_MAC0_OFFSET 0 |
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47 | #define BHR_4GRV2_MAC1_OFFSET 6 |
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48 | |||
49 | static struct gpio_led bhr_4grv2_leds_gpio[] __initdata = { |
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50 | { |
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51 | .name = "buffalo:red:vpn", |
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52 | .gpio = BHR_4GRV2_GPIO_LED_VPN_RED, |
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53 | .active_low = 1, |
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54 | }, |
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55 | { |
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56 | .name = "buffalo:green:vpn", |
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57 | .gpio = BHR_4GRV2_GPIO_LED_VPN_GREEN, |
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58 | .active_low = 1, |
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59 | }, |
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60 | { |
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61 | .name = "buffalo:green:power", |
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62 | .gpio = BHR_4GRV2_GPIO_LED_POWER_GREEN, |
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63 | .active_low = 1, |
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64 | }, |
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65 | { |
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66 | .name = "buffalo:red:diag", |
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67 | .gpio = BHR_4GRV2_GPIO_LED_DIAG_RED, |
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68 | .active_low = 1, |
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69 | } |
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70 | }; |
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71 | |||
72 | static struct gpio_keys_button bhr_4grv2_gpio_keys[] __initdata = { |
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73 | { |
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74 | .desc = "Reset button", |
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75 | .type = EV_KEY, |
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76 | .code = KEY_RESTART, |
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77 | .debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL, |
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78 | .gpio = BHR_4GRV2_GPIO_BTN_RESET, |
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79 | .active_low = 1, |
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80 | }, |
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81 | { |
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82 | .desc = "ECO button", |
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83 | .type = EV_KEY, |
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84 | .code = BTN_0, |
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85 | .debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL, |
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86 | .gpio = BHR_4GRV2_GPIO_BTN_ECO, |
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87 | .active_low = 1, |
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88 | }, |
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89 | }; |
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90 | |||
91 | /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ |
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92 | static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad0_cfg = { |
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93 | .mode = AR8327_PAD_MAC_SGMII, |
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94 | .sgmii_delay_en = true, |
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95 | }; |
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96 | |||
97 | /* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */ |
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98 | static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad6_cfg = { |
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99 | .mode = AR8327_PAD_MAC_RGMII, |
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100 | .txclk_delay_en = true, |
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101 | .rxclk_delay_en = true, |
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102 | .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, |
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103 | .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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104 | }; |
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105 | |||
106 | static struct ar8327_platform_data bhr_4grv2_ar8327_data = { |
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107 | .pad0_cfg = &bhr_4grv2_ar8327_pad0_cfg, |
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108 | .pad6_cfg = &bhr_4grv2_ar8327_pad6_cfg, |
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109 | .port0_cfg = { |
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110 | .force_link = 1, |
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111 | .speed = AR8327_PORT_SPEED_1000, |
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112 | .duplex = 1, |
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113 | .txpause = 1, |
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114 | .rxpause = 1, |
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115 | }, |
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116 | .port6_cfg = { |
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117 | .force_link = 1, |
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118 | .speed = AR8327_PORT_SPEED_1000, |
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119 | .duplex = 1, |
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120 | .txpause = 1, |
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121 | .rxpause = 1, |
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122 | }, |
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123 | }; |
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124 | |||
125 | static struct mdio_board_info bhr_4grv2_mdio0_info[] = { |
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126 | { |
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127 | .bus_id = "ag71xx-mdio.0", |
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3 | office | 128 | .phy_addr = 0, |
1 | office | 129 | .platform_data = &bhr_4grv2_ar8327_data, |
130 | }, |
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131 | }; |
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132 | |||
133 | static void __init bhr_4grv2_setup(void) |
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134 | { |
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135 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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136 | |||
137 | ath79_register_m25p80(NULL); |
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138 | |||
139 | ath79_register_leds_gpio(-1, ARRAY_SIZE(bhr_4grv2_leds_gpio), |
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140 | bhr_4grv2_leds_gpio); |
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141 | ath79_register_gpio_keys_polled(-1, BHR_4GRV2_KEYS_POLL_INTERVAL, |
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142 | ARRAY_SIZE(bhr_4grv2_gpio_keys), |
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143 | bhr_4grv2_gpio_keys); |
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144 | |||
145 | mdiobus_register_board_info(bhr_4grv2_mdio0_info, |
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146 | ARRAY_SIZE(bhr_4grv2_mdio0_info)); |
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147 | ath79_register_mdio(0, 0x0); |
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148 | |||
149 | ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); |
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150 | |||
151 | /* GMAC0 is connected to the RGMII interface */ |
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152 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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153 | ath79_eth0_data.phy_mask = BIT(0); |
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154 | ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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155 | ath79_eth0_pll_data.pll_1000 = 0x56000000; |
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156 | |||
157 | ath79_init_mac(ath79_eth0_data.mac_addr, art + BHR_4GRV2_MAC0_OFFSET, 0); |
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158 | ath79_register_eth(0); |
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159 | |||
160 | /* GMAC1 is connected to the SGMII interface */ |
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161 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; |
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162 | ath79_eth1_data.speed = SPEED_1000; |
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163 | ath79_eth1_data.duplex = DUPLEX_FULL; |
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164 | ath79_eth1_pll_data.pll_1000 = 0x03000101; |
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165 | |||
166 | ath79_init_mac(ath79_eth1_data.mac_addr, art + BHR_4GRV2_MAC1_OFFSET, 0); |
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167 | ath79_register_eth(1); |
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168 | } |
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169 | |||
170 | MIPS_MACHINE(ATH79_MACH_BHR_4GRV2, "BHR-4GRV2", |
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171 | "Buffalo BHR-4GRV2", bhr_4grv2_setup); |