OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * Atheros AP96 board support |
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3 | * |
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4 | * Copyright (C) 2009 Marco Porsch |
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5 | * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> |
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6 | * Copyright (C) 2010 Atheros Communications |
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7 | * |
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8 | * This program is free software; you can redistribute it and/or modify it |
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9 | * under the terms of the GNU General Public License version 2 as published |
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10 | * by the Free Software Foundation. |
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11 | */ |
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12 | |||
13 | #include <linux/platform_device.h> |
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14 | #include <linux/delay.h> |
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15 | |||
16 | #include <asm/mach-ath79/ath79.h> |
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17 | |||
18 | #include "dev-ap9x-pci.h" |
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19 | #include "dev-eth.h" |
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20 | #include "dev-gpio-buttons.h" |
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21 | #include "dev-leds-gpio.h" |
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22 | #include "dev-m25p80.h" |
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23 | #include "dev-usb.h" |
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24 | #include "machtypes.h" |
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25 | |||
26 | #define AP96_GPIO_LED_12_GREEN 0 |
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27 | #define AP96_GPIO_LED_3_GREEN 1 |
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28 | #define AP96_GPIO_LED_2_GREEN 2 |
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29 | #define AP96_GPIO_LED_WPS_GREEN 4 |
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30 | #define AP96_GPIO_LED_5_GREEN 5 |
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31 | #define AP96_GPIO_LED_4_ORANGE 6 |
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32 | |||
33 | /* Reset button - next to the power connector */ |
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34 | #define AP96_GPIO_BTN_RESET 3 |
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35 | /* WPS button - next to a led on right */ |
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36 | #define AP96_GPIO_BTN_WPS 8 |
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37 | |||
38 | #define AP96_KEYS_POLL_INTERVAL 20 /* msecs */ |
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39 | #define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL) |
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40 | |||
41 | #define AP96_WMAC0_MAC_OFFSET 0x120c |
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42 | #define AP96_WMAC1_MAC_OFFSET 0x520c |
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43 | #define AP96_CALDATA0_OFFSET 0x1000 |
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44 | #define AP96_CALDATA1_OFFSET 0x5000 |
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45 | |||
46 | /* |
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47 | * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12 |
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48 | * below (from left to right on the board). Led 1 seems to be on whenever the |
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49 | * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange; |
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50 | * others are green. |
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51 | * |
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52 | * In addition, there is one led next to a button on the right side for WPS. |
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53 | */ |
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54 | static struct gpio_led ap96_leds_gpio[] __initdata = { |
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55 | { |
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56 | .name = "ap96:green:led2", |
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57 | .gpio = AP96_GPIO_LED_2_GREEN, |
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58 | .active_low = 1, |
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59 | }, { |
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60 | .name = "ap96:green:led3", |
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61 | .gpio = AP96_GPIO_LED_3_GREEN, |
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62 | .active_low = 1, |
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63 | }, { |
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64 | .name = "ap96:orange:led4", |
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65 | .gpio = AP96_GPIO_LED_4_ORANGE, |
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66 | .active_low = 1, |
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67 | }, { |
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68 | .name = "ap96:green:led5", |
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69 | .gpio = AP96_GPIO_LED_5_GREEN, |
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70 | .active_low = 1, |
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71 | }, { |
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72 | .name = "ap96:green:led12", |
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73 | .gpio = AP96_GPIO_LED_12_GREEN, |
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74 | .active_low = 1, |
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75 | }, { /* next to a button on right */ |
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76 | .name = "ap96:green:wps", |
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77 | .gpio = AP96_GPIO_LED_WPS_GREEN, |
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78 | .active_low = 1, |
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79 | } |
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80 | }; |
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81 | |||
82 | static struct gpio_keys_button ap96_gpio_keys[] __initdata = { |
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83 | { |
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84 | .desc = "reset", |
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85 | .type = EV_KEY, |
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86 | .code = KEY_RESTART, |
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87 | .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, |
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88 | .gpio = AP96_GPIO_BTN_RESET, |
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89 | .active_low = 1, |
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90 | }, { |
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91 | .desc = "wps", |
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92 | .type = EV_KEY, |
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93 | .code = KEY_WPS_BUTTON, |
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94 | .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, |
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95 | .gpio = AP96_GPIO_BTN_WPS, |
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96 | .active_low = 1, |
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97 | } |
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98 | }; |
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99 | |||
100 | #define AP96_WAN_PHYMASK 0x10 |
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101 | #define AP96_LAN_PHYMASK 0x0f |
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102 | |||
103 | static void __init ap96_setup(void) |
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104 | { |
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105 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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106 | |||
107 | ath79_register_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK)); |
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108 | |||
109 | ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); |
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110 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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111 | ath79_eth0_data.phy_mask = AP96_LAN_PHYMASK; |
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112 | ath79_eth0_data.speed = SPEED_1000; |
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113 | ath79_eth0_data.duplex = DUPLEX_FULL; |
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114 | |||
115 | ath79_register_eth(0); |
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116 | |||
117 | ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); |
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118 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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119 | ath79_eth1_data.phy_mask = AP96_WAN_PHYMASK; |
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120 | |||
121 | ath79_eth1_pll_data.pll_1000 = 0x1f000000; |
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122 | |||
123 | ath79_register_eth(1); |
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124 | |||
125 | ath79_register_usb(); |
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126 | |||
127 | ath79_register_m25p80(NULL); |
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128 | |||
129 | ath79_register_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio), |
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130 | ap96_leds_gpio); |
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131 | |||
132 | ath79_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL, |
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133 | ARRAY_SIZE(ap96_gpio_keys), |
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134 | ap96_gpio_keys); |
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135 | |||
136 | ap94_pci_init(art + AP96_CALDATA0_OFFSET, |
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137 | art + AP96_WMAC0_MAC_OFFSET, |
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138 | art + AP96_CALDATA1_OFFSET, |
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139 | art + AP96_WMAC1_MAC_OFFSET); |
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140 | } |
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141 | |||
142 | MIPS_MACHINE(ATH79_MACH_AP96, "AP96", "Atheros AP96", ap96_setup); |