OpenWrt – Blame information for rev 3

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1 office 1 /*
2 * Atheros AP132 reference board support
3 *
4 * Copyright (c) 2012 Qualcomm Atheros
5 * Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (c) 2013 Embedded Wireless GmbH <info@embeddedwireless.de>
7 *
8 * Permission to use, copy, modify, and/or distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 *
20 */
21  
22 #include <linux/platform_device.h>
23 #include <linux/ar8216_platform.h>
24  
25 #include <asm/mach-ath79/ar71xx_regs.h>
26  
27 #include "common.h"
28 #include "dev-ap9x-pci.h"
29 #include "dev-gpio-buttons.h"
30 #include "dev-eth.h"
31 #include "dev-leds-gpio.h"
32 #include "dev-m25p80.h"
33 #include "dev-usb.h"
34 #include "dev-wmac.h"
35 #include "machtypes.h"
36  
37 #define AP132_GPIO_LED_USB 4
38 #define AP132_GPIO_LED_WLAN_5G 12
39 #define AP132_GPIO_LED_WLAN_2G 13
40 #define AP132_GPIO_LED_STATUS_RED 14
41 #define AP132_GPIO_LED_WPS_RED 15
42  
43 #define AP132_GPIO_BTN_WPS 16
44  
45 #define AP132_KEYS_POLL_INTERVAL 20 /* msecs */
46 #define AP132_KEYS_DEBOUNCE_INTERVAL (3 * AP132_KEYS_POLL_INTERVAL)
47  
48 #define AP132_MAC0_OFFSET 0
49 #define AP132_WMAC_CALDATA_OFFSET 0x1000
50  
51 static struct gpio_led ap132_leds_gpio[] __initdata = {
52 {
53 .name = "ap132:red:status",
54 .gpio = AP132_GPIO_LED_STATUS_RED,
55 .active_low = 1,
56 },
57 {
58 .name = "ap132:red:wps",
59 .gpio = AP132_GPIO_LED_WPS_RED,
60 .active_low = 1,
61 },
62 {
63 .name = "ap132:red:wlan-2g",
64 .gpio = AP132_GPIO_LED_WLAN_2G,
65 .active_low = 1,
66 },
67 {
68 .name = "ap132:red:usb",
69 .gpio = AP132_GPIO_LED_USB,
70 .active_low = 1,
71 }
72 };
73  
74 static struct gpio_keys_button ap132_gpio_keys[] __initdata = {
75 {
76 .desc = "WPS button",
77 .type = EV_KEY,
78 .code = KEY_WPS_BUTTON,
79 .debounce_interval = AP132_KEYS_DEBOUNCE_INTERVAL,
80 .gpio = AP132_GPIO_BTN_WPS,
81 .active_low = 1,
82 },
83 };
84  
85 static struct ar8327_pad_cfg ap132_ar8327_pad0_cfg;
86  
87 static struct ar8327_platform_data ap132_ar8327_data = {
88 .pad0_cfg = &ap132_ar8327_pad0_cfg,
89 .port0_cfg = {
90 .force_link = 1,
91 .speed = AR8327_PORT_SPEED_1000,
92 .duplex = 1,
93 .txpause = 1,
94 .rxpause = 1,
95 },
96 };
97  
98 static struct mdio_board_info ap132_mdio1_info[] = {
99 {
100 .bus_id = "ag71xx-mdio.1",
3 office 101 .phy_addr = 0,
1 office 102 .platform_data = &ap132_ar8327_data,
103 },
104 };
105  
106 static void __init ap132_mdio_setup(void)
107 {
108 void __iomem *base;
109 u32 t;
110  
111 #define GPIO_IN_ENABLE3_ADDRESS 0x0050
112 #define GPIO_IN_ENABLE3_MII_GE1_MDI_MASK 0x00ff0000
113 #define GPIO_IN_ENABLE3_MII_GE1_MDI_LSB 16
114 #define GPIO_IN_ENABLE3_MII_GE1_MDI_SET(x) (((x) << GPIO_IN_ENABLE3_MII_GE1_MDI_LSB) & GPIO_IN_ENABLE3_MII_GE1_MDI_MASK)
115 #define GPIO_OUT_FUNCTION4_ADDRESS 0x003c
116 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK 0xff000000
117 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB 24
118 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK)
119 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK 0x0000ff00
120 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB 8
121 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK)
122  
123 base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
124  
125 t = __raw_readl(base + GPIO_IN_ENABLE3_ADDRESS);
126 t &= ~GPIO_IN_ENABLE3_MII_GE1_MDI_MASK;
127 t |= GPIO_IN_ENABLE3_MII_GE1_MDI_SET(19);
128 __raw_writel(t, base + GPIO_IN_ENABLE3_ADDRESS);
129  
130  
131 __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 19), base + AR71XX_GPIO_REG_OE);
132  
133 __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 17), base + AR71XX_GPIO_REG_OE);
134  
135  
136 t = __raw_readl(base + GPIO_OUT_FUNCTION4_ADDRESS);
137 t &= ~(GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK);
138 t |= GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(0x20) | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(0x21);
139 __raw_writel(t, base + GPIO_OUT_FUNCTION4_ADDRESS);
140  
141 iounmap(base);
142  
143 }
144  
145 static void __init ap132_setup(void)
146 {
147 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
148  
149 ath79_register_m25p80(NULL);
150  
151 ath79_register_leds_gpio(-1, ARRAY_SIZE(ap132_leds_gpio),
152 ap132_leds_gpio);
153 ath79_register_gpio_keys_polled(-1, AP132_KEYS_POLL_INTERVAL,
154 ARRAY_SIZE(ap132_gpio_keys),
155 ap132_gpio_keys);
156  
157 ath79_register_usb();
158  
159 ath79_register_wmac(art + AP132_WMAC_CALDATA_OFFSET, NULL);
160  
161 /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
162 ap132_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII;
163 ap132_ar8327_pad0_cfg.sgmii_delay_en = true;
164  
165 ath79_eth1_pll_data.pll_1000 = 0x03000101;
166  
167 ap132_mdio_setup();
168  
169 ath79_register_mdio(1, 0x0);
170  
171 ath79_init_mac(ath79_eth1_data.mac_addr, art + AP132_MAC0_OFFSET, 0);
172  
173 mdiobus_register_board_info(ap132_mdio1_info,
174 ARRAY_SIZE(ap132_mdio1_info));
175  
176 /* GMAC1 is connected to the SGMII interface */
177 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
178 ath79_eth1_data.speed = SPEED_1000;
179 ath79_eth1_data.duplex = DUPLEX_FULL;
180 ath79_eth1_data.phy_mask = BIT(0);
181 ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev;
182  
183 ath79_register_eth(1);
184 }
185  
186 MIPS_MACHINE(ATH79_MACH_AP132, "AP132",
187 "Atheros AP132 reference board",
188 ap132_setup);
189