OpenWrt – Blame information for rev 3

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1 office 1 /*
2 * OpenMesh A60 support
3 *
4 * Copyright (C) 2013 Marek Lindner <marek@open-mesh.com>
5 * Copyright (C) 2014-2017 Sven Eckelmann <sven@open-mesh.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11  
12 #include <linux/gpio.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/platform_device.h>
16 #include <linux/platform_data/phy-at803x.h>
17  
18 #include <asm/mach-ath79/ar71xx_regs.h>
19 #include <asm/mach-ath79/ath79.h>
20  
21 #include "common.h"
22 #include "dev-ap9x-pci.h"
23 #include "dev-eth.h"
24 #include "dev-leds-gpio.h"
25 #include "dev-gpio-buttons.h"
26 #include "dev-m25p80.h"
27 #include "dev-wmac.h"
28 #include "machtypes.h"
29 #include "pci.h"
30 #include "dev-usb.h"
31  
32 #define A60_GPIO_LED_RED 22
33 #define A60_GPIO_LED_GREEN 23
34 #define A60_GPIO_LED_BLUE 13
35  
36 #define A60_GPIO_BTN_RESET 17
37  
38 #define A60_KEYS_POLL_INTERVAL 20 /* msecs */
39 #define A60_KEYS_DEBOUNCE_INTERVAL (3 * A60_KEYS_POLL_INTERVAL)
40  
41 #define A60_WMAC_CALDATA_OFFSET 0x1000
42  
43 static struct gpio_led a40_leds_gpio[] __initdata = {
44 {
45 .name = "a40:red:status",
46 .gpio = A60_GPIO_LED_RED,
47 }, {
48 .name = "a40:green:status",
49 .gpio = A60_GPIO_LED_GREEN,
50 }, {
51 .name = "a40:blue:status",
52 .gpio = A60_GPIO_LED_BLUE,
53 }
54 };
55  
56 static struct gpio_led a60_leds_gpio[] __initdata = {
57 {
58 .name = "a60:red:status",
59 .gpio = A60_GPIO_LED_RED,
60 }, {
61 .name = "a60:green:status",
62 .gpio = A60_GPIO_LED_GREEN,
63 }, {
64 .name = "a60:blue:status",
65 .gpio = A60_GPIO_LED_BLUE,
66 }
67 };
68  
69 static struct gpio_keys_button a60_gpio_keys[] __initdata = {
70 {
71 .desc = "Reset button",
72 .type = EV_KEY,
73 .code = KEY_RESTART,
74 .debounce_interval = A60_KEYS_DEBOUNCE_INTERVAL,
75 .gpio = A60_GPIO_BTN_RESET,
76 .active_low = 1,
77 },
78 };
79  
80 static struct at803x_platform_data a60_at803x_data = {
81 .disable_smarteee = 1,
82 .enable_rgmii_rx_delay = 1,
83 .enable_rgmii_tx_delay = 1,
84 };
85  
86 static struct mdio_board_info a60_mdio0_info[] = {
87 {
88 .bus_id = "ag71xx-mdio.0",
3 office 89 .phy_addr = 1,
1 office 90 .platform_data = &a60_at803x_data,
91 },
92 {
93 .bus_id = "ag71xx-mdio.0",
3 office 94 .phy_addr = 2,
1 office 95 .platform_data = &a60_at803x_data,
96 },
97 };
98  
99 static void __init a60_setup_qca955x_eth_cfg(u32 mask,
100 unsigned int rxd,
101 unsigned int rxdv,
102 unsigned int txd,
103 unsigned int txe)
104 {
105 void __iomem *base;
106 u32 t;
107  
108 base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
109  
110 t = mask;
111 t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
112 t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
113 t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
114 t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
115  
116 __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
117  
118 iounmap(base);
119 }
120  
121 static void __init a60_setup_common(void)
122 {
123 u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
124 u8 mac[6];
125  
126 ath79_register_usb();
127  
128 ath79_register_m25p80(NULL);
129 ath79_register_gpio_keys_polled(-1, A60_KEYS_POLL_INTERVAL,
130 ARRAY_SIZE(a60_gpio_keys),
131 a60_gpio_keys);
132  
133 ath79_init_mac(mac, art, 0x02);
134 ath79_register_wmac(art + A60_WMAC_CALDATA_OFFSET, mac);
135  
136 a60_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
137 ath79_register_mdio(0, 0x0);
138  
139 mdiobus_register_board_info(a60_mdio0_info, ARRAY_SIZE(a60_mdio0_info));
140  
141 ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);
142 ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);
143  
144 /* GMAC0 is connected to the PHY1 */
145 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
146 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
147 ath79_eth0_data.phy_mask = BIT(1);
148 ath79_eth0_pll_data.pll_1000 = 0x82000101;
149 ath79_eth0_pll_data.pll_100 = 0x80000101;
150 ath79_eth0_pll_data.pll_10 = 0x80001313;
151 ath79_register_eth(0);
152  
153 /* GMAC1 is connected to MDIO1 in SGMII mode */
154 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
155 ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;
156 ath79_eth1_data.phy_mask = BIT(2);
157 ath79_eth1_pll_data.pll_1000 = 0x03000101;
158 ath79_eth1_pll_data.pll_100 = 0x80000101;
159 ath79_eth1_pll_data.pll_10 = 0x80001313;
160 ath79_eth1_data.speed = SPEED_1000;
161 ath79_eth1_data.duplex = DUPLEX_FULL;
162 ath79_register_eth(1);
163  
164 ath79_register_pci();
165 }
166  
167 static void __init a40_setup(void)
168 {
169 ath79_register_leds_gpio(-1, ARRAY_SIZE(a40_leds_gpio), a40_leds_gpio);
170 a60_setup_common();
171 }
172  
173 MIPS_MACHINE(ATH79_MACH_A40, "A40", "OpenMesh A40", a40_setup);
174  
175 static void __init a60_setup(void)
176 {
177 ath79_register_leds_gpio(-1, ARRAY_SIZE(a60_leds_gpio), a60_leds_gpio);
178 a60_setup_common();
179 }
180  
181 MIPS_MACHINE(ATH79_MACH_A60, "A60", "OpenMesh A60", a60_setup);